Abstract: Data bus steering logic routes data between various byte lanes of the system bus. Additionally, control signals are provided which allow the connected device and the steering logic to communicate and respond to requests made by the CPU. The steering logic provides a path between the attached device and the byte lanes of the system bus, to which the device is not directly connected. During load and store operations data is transferred via the steering logic and directly between the device and CPU on to the portion of the system bus that it is directly connected to. The steering logic includes a multiplexer, latch, buffer, driver and the like for each lane of data on the system bus. For example, if the system bus is 64 bits wide and a 32 bit device is connected to one-half of the bus, the steering logic will provide a path from the 32 bit device to the other 32 bits of the system bus not directly connected to the device.