Abstract: Methods for managing response data within an information handling system (IHS), where the method includes the step of obtaining response data from at least one component in the IHS, the response data generated in response to receiving a command. The method also includes accumulating the response data from the at least one component to compute a total response time.

Abstract: An information handling system (IHS) includes a processor and a single universal storage device with a system memory region and a mass storage region, wherein disk commands are executed by the processor as transfers between the system memory region and the mass storage region.

Abstract: Plural consecutive virtual memory pages associated with an application running on an information handling system are mapped to a physical memory page of the information handling system's physical memory, such as dual channel interleaved memory. Each physical memory page that stores plural consecutive virtual memory pages becomes an effective cache of those virtual memory pages with a RAS operation on the memory, thus providing more efficient memory access in streaming applications. A memory mapping engine associated with the operating system of the information handling system maps plural virtual memory pages to single physical memory pages according to a ratio of physical memory size to virtual memory size provided by a memory manager of the information handling system BIOS, such as with an ACPI message.

Abstract: Systems and methods for using a page table in an information handling system including a semiconductor storage device are disclosed. A page table in an information handling system may be provided. The information handling system may include a memory, and the memory may include a semiconductor storage device. NonDRAM tag data may be stored in the page table. The nonDRAM tag data may indicate one or more attributes of one or more pages in the semiconductor storage device.

Abstract: Systems and methods for optimizing performance of an information handling system component communicatively coupled to the information handling system are disclosed. An information handling system may include a data gathering module and an operating condition controller module. The data gathering module may be configured to retrieve an operating condition characterization value from the component. That operating condition characterization value may be substantially based on a predetermined characteristic of the component. The operating condition controller module may be configured to modify an operating condition of the component based at least on the retrieved operating condition characterization value.

Abstract: A forced power down signal issues from an I/O device to an information handling system through an optical interconnect if the information handling system fails to power down in response to a normal power down message. A 100% duty cycle signal issues from an optical interface at the I/O device and is detected by an optical interface of the information handling system, which issues a command to force a power down of the information handling system in response to the forced power down signal.

Abstract: A forced power down signal issues from an I/O device to an information handling system through an optical interconnect if the information handling system fails to power down in response to a normal power down message. A 100% duty cycle signal issues from an optical interface at the I/O device and is detected by an optical interface of the information handling system, which issues a command to force a power down of the information handling system in response to the forced power down signal.

Abstract: An information handling system universal memory architecture assigns memory blocks to information handling system functions, such as a persistent storage function and a working storage function, that have different relative rates of writes of information. The blocks are periodically analyzed for remaining memory life to reassign blocks to functions that result in wear leveling across the blocks. For example, blocks having relatively low life remaining that are assigned to functions having a relatively high number of writes have their function switched with blocks that have a relatively high life remaining that are assigned to functions having a relatively low number of writes. In addition, wear leveling performed within a block ensures even wear of the memory cells within the block.

Abstract: Systems and methods for power state transitioning in an information handling system having a volatile memory and a nonvolatile memory are disclosed. Dirty data in the volatile memory may be identified. The dirty data may include data that has not been stored in the nonvolatile memory. Dirty data may be written from the volatile memory to the nonvolatile memory. Transitioning to a reduced power state may be in response to a trigger event. Transitioning from the reduced power state may be in response to a wake signal. Data may be copied from the nonvolatile memory to the volatile memory. An operating system may be waked to a restored state.

Abstract: Systems and methods for using a page table in an information handling system including a semiconductor storage device are disclosed. A page table in an information handling system may be provided. The information handling system may include a memory, and the memory may include a semiconductor storage device. NonDRAM tag data may be stored in the page table. The nonDRAM tag data may indicate one or more attributes of one or more pages in the semiconductor storage device.

Abstract: Systems and methods for optimizing performance of an information handling system component communicatively coupled to the information handling system are disclosed. An information handling system may include a data gathering module and an operating condition controller module. The data gathering module may be configured to retrieve an operating condition characterization value from the component. That operating condition characterization value may be substantially based on a predetermined characteristic of the component. The operating condition controller module may be configured to modify an operating condition of the component based at least on the retrieved operating condition characterization value.

Abstract: An information handling system includes support for dynamic power throttling. In one embodiment, an information handling system includes power level detection and power control modules. The power level detection module may monitor power consumption for the information handling system and may automatically transmit power level data to a power level manager, based on the monitored power consumption. The power control module may receive power control data from the power level manager. The power control module may also automatically adjust power consumption of the information handling system, in accordance with the power control data received from the power level manager. In another embodiment, an information handling system may include an interface and a power level manager. The power level manager may receive power information for computers via the interface, may automatically compute an adjusted power threshold setting, and may automatically transmit the adjusted power threshold setting to a computer.

Abstract: An interconnect circuit, system, and method for providing operating modes for communication channels is disclosed. According to one aspect, a method of determining an operating mode for a communication link can include providing an operating parameter within a memory device. The operating parameter can be provided in association with a channel characteristic of a communication channel. The method can further include reading the operating parameter stored within the memory device and communicating the operating parameter to a communication interface. The method can also include comparing the operating parameter to a performance limit of the communication interface and establishing an operating mode of the communication link in response to the comparison.

Abstract: A mechanism which allows pages of flash memory to be read directly into cache. The mechanism enables different cache line sizes for different cache levels in a cache hierarchy, and optionally, multiple line size support, simultaneously or as an initialization option, in the highest level (largest/slowest) cache. Such a mechanism improves performance and reduces cost for some applications.

Abstract: Processing components to manufacture information handling systems have build-to-order integrated circuits with plural selectively-enabled features set at the information handling system manufacture location. For instance, fuses integrated in the integrated circuits are selectively blown at the information handling system manufacture location to permanently disable features so that the processing components have a desired configuration. As another example, feature enable or disable states are programmed in flash incorporated in the integrated circuit, with the flash programmability subsequently disabled to permanently set the features so that the processing components have a desired configuration. Features are set with keys provided by the processing component manufacturer to track the information handling system manufacturer's use of the features.

Abstract: Information handling system errors are presented at a display with the information handling system graphics subsystem inoperative by communicating an identified error to the display through an auxiliary channel and generating a presentation of the error information with a microcontroller of the display. For example, errors determined by BIOS firmware running on a chipset are communicated through a DDC or I2C channel from the chipset to the display so that textual error messages are generated at the display without the use of the information handling system's graphic processor to generate an error message image.

Abstract: A system and method for regulating the power consumption of a computer system is disclosed. The power supplied to the computer system is evaluated. If the power supplied to or delivered by the computer system is sufficiently substandard, a command is issued to cause the components of the computer system to enter a reduced power condition.

Abstract: A method for translating a system address includes providing a first system address to a firmware and retrieving a first translation data corresponding to a memory configuration from storage. The first system address is translated into a first physical location utilizing the first translation data, and the first physical location is outputted.

Abstract: Methods for managing response data within an information handling system (IHS), where the method includes the step of obtaining response data from at least one component in the IHS, the response data generated in response to receiving a command. The method also includes accumulating the response data from the at least one component to compute a total response time.

Abstract: An interconnect circuit, system, and method for providing operating modes for communication channels is disclosed. According to one aspect, a method of determining an operating mode for a communication link can include providing an operating parameter within a memory device. The operating parameter can be provided in association with a channel characteristic of a communication channel. The method can further include reading the operating parameter stored within the memory device and communicating the operating parameter to a communication interface. The method can also include comparing the operating parameter to a performance limit of the communication interface and establishing an operating mode of the communication link in response to the comparison.