Patents by Inventor William H. Lytle

William H. Lytle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9142434
    Abstract: Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: September 22, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Wei Gao, Craig S. Amrine, Zhiwei Gong, Scott M. Hayes, Lizabeth Ann Keser, George R. Leal, William H. Lytle
  • Patent number: 9107303
    Abstract: An electronic panel assembly (EPA) includes one or more electronic devices with primary faces having electrical contacts, opposed rear faces and edges therebetween. The devices are mounted primary faces down in openings in a warp control sheet (WCS). Cured plastic encapsulation is formed at least between lateral edges of the devices and WCS openings. Undesirable panel warping during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. Thin film insulators and conductors couple electrical contacts on various devices to each other and to external terminals, thereby forming an integrated multi-device EPA.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 11, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William H. Lytle, Scott M. Hayes, George R. Leal
  • Publication number: 20140369015
    Abstract: An electronic panel assembly (EPA) includes one or more electronic devices with primary faces having electrical contacts, opposed rear faces and edges therebetween. The devices are mounted primary faces down in openings in a warp control sheet (WCS). Cured plastic encapsulation is formed at least between lateral edges of the devices and WCS openings. Undesirable panel warping during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. Thin film insulators and conductors couple electrical contacts on various devices to each other and to external terminals, thereby forming an integrated multi-device EPA.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 18, 2014
    Inventors: WILLIAM H. LYTLE, Scott M. Hayes, George R. Leal
  • Patent number: 8829661
    Abstract: Methods and apparatus are provided for an electronic panel assembly (EPA) (82, 83), comprising: providing one or more electronic devices (30) with primary faces (31) having electrical contacts (36), opposed rear faces (33) and edges (32) therebetween. The devices (30) are mounted primary faces (31) down on a temporary support (60) in openings (44) in a warp control sheet (WCS) (40) attached to the support (60). Plastic encapsulation (50) is formed at least between lateral edges (32, 43) of the devices (30) and WCS openings (44). Undesirable panel warping (76) during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. After encapsulation cure, the EPA (82) containing the devices (30) and the WCS (40) is separated from the temporary support (60) and, optionally, mounted on another carrier (70) with electrical contacts (36) exposed.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 9, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William H. Lytle, Scott M. Hayes, George R. Leal
  • Patent number: 8415203
    Abstract: A method of forming a semiconductor package includes providing a carrier, attaching a first surface of a first device on the carrier, wherein the first surface comprises a first active surface of the first device, and attaching a second surface of a second device on the carrier. In one embodiment, the second surface is opposite a third surface of the second semiconductor die and the third surface comprises a second active surface. A first insulating material can be formed between the first device and the second device.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: April 9, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kenneth R. Burch, Marc A. Mangrum, William H. Lytle
  • Patent number: 8327532
    Abstract: Methods for forming a microelectronic assembly (82) are provided. In one embodiment, the method includes providing a device substrate (50) having a plurality of electronic components (42) coupled thereto, and providing a carrier substrate (54) having first and second opposing surfaces (60, 62) and including a plurality of openings (58) extending between the first and second opposing surfaces (60, 62) and a plurality of depressions (64) formed on the first opposing surface (60). The method further includes attaching the device substrate (50) to the first opposing surface (60) of the carrier substrate (54) using an adhesive material (56) such that at least some of the adhesive material (56) is adjacent to at least some of the plurality of depressions (64), and removing the device substrate (50) from the carrier substrate (54).
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: December 11, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jianwen Xu, Scott M. Hayes, William H. Lytle
  • Publication number: 20110217814
    Abstract: Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.
    Type: Application
    Filed: October 23, 2008
    Publication date: September 8, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Wei Gao, Craig S. Amrine, Zhiwei Gong, Scott M. Hayes, Lizabeth Ann Keser, George R. Leal, William H. Lytle
  • Patent number: 7969026
    Abstract: An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: June 28, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William H. Lytle, Craig S. Amrine
  • Publication number: 20110119910
    Abstract: Methods and system for forming a microelectronic assembly (82) are provided. A device substrate (50) having a plurality of electronic components (42) coupled thereto is provided. A carrier substrate (54) having first and second opposing surfaces (60, 62) and including a plurality of openings (58) extending between the first and second opposing surfaces (60, 62) and a plurality of depressions (64) formed on the first opposing surface (60) is provided. The device substrate (50) is attached to the first opposing surface (60) of the carrier substrate (54) using an adhesive material (56) such that at least some of the adhesive material (56) is adjacent to at least some of the plurality of depressions (64).
    Type: Application
    Filed: November 23, 2009
    Publication date: May 26, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jianwen Xu, Scott M. Hayes, William H. Lytle
  • Patent number: 7838420
    Abstract: A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: November 23, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jinbang Tang, Darrel R. Frear, William H. Lytle
  • Patent number: 7820485
    Abstract: A method of forming a semiconductor package includes forming a coating over a first device, attaching the first device to a substrate using an adhesive, encapsulating the first device using an encapsulant material, releasing the first device from the substrate using the adhesive, removing a portion of the encapsulant material that is over the first device to expose the coating, and removing the coating over the first device to expose a portion of the first device.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: October 26, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: William H. Lytle
  • Patent number: 7802359
    Abstract: A method is described for manufacturing electronic assemblies (52). Electronic die (36) held in a plastic matrix (43) form a partially completed panel (35) of electronic assemblies (52). The panel (35) is adhesively mounted to a ceramic carrier (20) having multiple holes (22) there through. Conductive interconnects (38-1, 38-2, etc.) and other layers are applied to the panel, coupled to electrical contacts on the die (36) and external electrical contacts (39-1) for the panel (50). The panel (50) and the carrier (20) are separated and the panel singulated to release the finished electronic assemblies (52). Silicone is a preferred adhesive (27) and is dissolved using a non-polar solvent (70) that penetrates through the holes (22) in the carrier (20) to the adhesive (27). The adhesive (27) is preferentially applied using a transfer adhesive sandwich (24), that is, an adhesive layer (27) with removable plastic sheets (25, 26) on either side that can be peeled away from the adhesive (27).
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: September 28, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William H. Lytle, Craig S. Amrine
  • Patent number: 7741151
    Abstract: Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: June 22, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Craig S. Amrine, William H. Lytle
  • Publication number: 20100112756
    Abstract: Integrated circuit packages are formed from a panel where the panel is separated by laser cutting the panel. In some embodiments, the panel is attached to the carrier for the formation of interconnect layers on the panel. Afterwards, the panel is cut with a laser while on the carrier to separate the integrated circuit packages. A tape or other type of structure may be attached to the top of the packages after the laser cutting. The integrated circuit packages are removed from the carrier by releasing the adhesive and removing the integrated circuit packages with the tape. The packages are then removed from the tape.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 6, 2010
    Inventors: Craig S. Amrine, William H. Lytle
  • Publication number: 20100081234
    Abstract: A method of forming a semiconductor package includes forming a coating over a first device, attaching the first device to a substrate using an adhesive, encapsulating the first device using an encapsulant material, releasing the first device from the substrate using the adhesive, removing a portion of the encapsulant material that is over the first device to expose the coating, and removing the coating over the first device to expose a portion of the first device.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Inventor: WILLIAM H. LYTLE
  • Patent number: 7595226
    Abstract: A structure (40) for holding an integrated circuit die (38) during packaging includes a support substrate (42), a release film (44) attached to the substrate (42), and a swelling agent (60). A method (34) of packaging the die (38) includes placing the die (38) on the substrate (42) with its active surface (52) and bond pads (54) in contact with the film (44). The agent (60) is applied over an adhesive coating (50) of the film (44). The agent (60) causes the adhesive (50) to swell into contact with the bond pads (54) and/or to form fillets (64) of adhesive (50) about the die (38). The die (38) is encapsulated in a molding material (72) and released from the substrate (42) as a panel (74) of dies (38). Swelling of the adhesive (50) about the bond pads (54) prevents the molding material (72) from bleeding onto the bond pads (54).
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: September 29, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William H. Lytle, Owen R. Fay, Jianwen Xu
  • Publication number: 20090165293
    Abstract: A method is described for manufacturing electronic assemblies (52). Electronic die (36) held in a plastic matrix (43) form a partially completed panel (35) of electronic assemblies (52). The panel (35) is adhesively mounted to a ceramic carrier (20) having multiple holes (22) there through. Conductive interconnects (38-1, 38-2, etc.) and other layers are applied to the panel, coupled to electrical contacts on the die (36) and external electrical contacts (39-1) for the panel (50). The panel (50) and the carrier (20) are separated and the panel singulated to release the finished electronic assemblies (52). Silicone is a preferred adhesive (27) and is dissolved using a non-polar solvent (70) that penetrates through the holes (22) in the carrier (20) to the adhesive (27). The adhesive (27) is preferentially applied using a transfer adhesive sandwich (24), that is, an adhesive layer (27) with removable plastic sheets (25, 26) on either side that can be peeled away from the adhesive (27).
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: William H. Lytle, Craig S. Amrine
  • Publication number: 20090061564
    Abstract: A structure (40) for holding an integrated circuit die (38) during packaging includes a support substrate (42), a release film (44) attached to the substrate (42), and a swelling agent (60). A method (34) of packaging the die (38) includes placing the die (38) on the substrate (42) with its active surface (52) and bond pads (54) in contact with the film (44). The agent (60) is applied over an adhesive coating (50) of the film (44). The agent (60) causes the adhesive (50) to swell into contact with the bond pads (54) and/or to form fillets (64) of adhesive (50) about the die (38). The die (38) is encapsulated in a molding material (72) and released from the substrate (42) as a panel (74) of dies (38). Swelling of the adhesive (50) about the bond pads (54) prevents the molding material (72) from bleeding onto the bond pads (54).
    Type: Application
    Filed: August 29, 2007
    Publication date: March 5, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: William H. Lytle, Owen R. Fay, Jianwen Xu
  • Publication number: 20090057849
    Abstract: A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 5, 2009
    Inventors: Jinbang Tang, Darrel R. Frear, William H. Lytle
  • Publication number: 20090008802
    Abstract: An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer.
    Type: Application
    Filed: September 17, 2008
    Publication date: January 8, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: William H. Lytle, Craig S. Amrine