Abstract: This invention relates to semiconductor devices, microelectronic devices, micro electro mechanical devices, microfluidic devices, and more particularly to a lithographic template, a method of forming the lithographic template and a method for forming devices with the lithographic template. The lithographic template (10) is formed having a substrate (12), an optional etch stop layer (16) formed on a surface (14) of the substrate (12), and a patterning layer (20) formed on a surface (18) of the etch stop layer (16). The template (10) is used in the fabrication of a semiconductor device (30) for affecting a pattern in device (30) by positioning the template (10) in close proximity to semiconductor device (30) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the relief image present on the template.

Abstract: A method of forming a hard mask for use in the formation of a refractory radiation mask including providing a membrane structure, forming a radiation absorbing layer to be patterned on the membrane structure, forming a hard mask layer on the surface of the membrane structure, the hard mask layer including a material system having a nominally zero stress and therefore reduced distortion of the membrane structure, and patterning the hard mask layer.

Abstract: A method for fabricating a patterning mask is disclosed in which a membrane layer is deposited on a first surface of a substrate. Patterned and unpatterned portions of the substrate are then defined on a second surface of the substrate. A majority of the thickness of substrate in the unpatterned portions is then dry etched to partially define a strut having sidewalls that are substantially perpendicular to the first surface. Wet etching is then performed to etch through the remaining thickness of the substrate to expose the bottom surface of the membrane layer and completely define the strut. Scattering elements may then be formed over the membrane layer. In one embodiment, the substrate is silicon and has a (110) orientation and an edge of the silicon struts is aligned to a {111} plane. In another embodiment, an edge of the silicon struts is aligned to a {221} plane.

Abstract: A rapid thermal processing susceptor including a base having a planar surface and an upright sidewall extending around a periphery thereof and encircling a working portion of the planar surface. The working portion and the sidewall define a cavity. A plurality of minimum contact points extend from the working portion into the cavity and are positioned to receive thereon a semiconductor wafer. A cover is receivable by the sidewall for enclosing the cavity.

Abstract: A method of in-situ endpoint detection for membrane formation including directing light from a light source onto one side of a membrane structure having at least one etchable component for the formation of a membrane and etching the membrane structure so as to form the membrane while sensing the light from the light source on an opposite side of the membrane structure in-situ during the etching to detect a thickness of the membrane. Generally, the etching step includes fountain cup etching with the light source being a fiber optic mounted in the fountain cup and a detector mounted in the cap.

Abstract: A method of forming a lithographic mask that comprises the steps of obtaining a first substrate having a first base and a first layer over the first base. The first layer is patterned, as is at least a portion of the entire thickness of the first base to form a first pattern. A second substrate having a second base is obtained and a second layer is formed over the second base. A third layer is formed over the second layer. The third layer is patterned to form an attenuating pattern corresponding to a semiconductor device feature pattern and the first and second substrates are bonded after patterning the first layer. The second base is etched to remove the entire thickness of the second base corresponding to the first pattern. The steps need not be sequential in the above method.

Abstract: A process for the fabrication of an X-ray absorbing mask includes providing a silicon substrate (10) having a front surface (16) and a back surface (18). A membrane layer (12) is formed on the front surface (16). In one embodiment of the invention, an etch stop layer (14) and an X-ray absorbing layer (20) are sequentially formed over the membrane layer (12). In a preferred embodiment, the X-ray absorbing layer (20) is tantalum silicon nitride deposited by RF sputter deposition directly onto the layers overlying the silicon substrate (10). The structure is then annealed at a temperature sufficient to reduce the internal stress in the X-ray absorbing layer (20). Finally, the X-ray absorbing layer is patterned to form a masking pattern (30, 36) on the membrane layer (12).

Abstract: A method for making an x-ray mask having a low-stress absorber layer. A substrate is placed in an electroplating system and an electroplating solution is provided to the electroplating system. The electroplating solution has a gold sulfite based component and a thallium based component. The thallium based component is at a concentration of at least 20 milligrams per liter of electroplating solution. A gold containing absorber layer is electrodeposited onto the substrate. A high concentration of thallium produces an absorber layer insensitive to the brightener concentration in the electroplating solution and having a stress less than approximately 1.times.10.sup.8 dynes/cm.sup.2. In addition, the absorber has a small grain size, a low surface roughness, and a low defect density. Thus, the absorber layer is easier to inspect and, if required, to repair.