Patents by Inventor William J. Gallagher

William J. Gallagher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10500708
    Abstract: A power tool is provided including a gear case having a spindle, a motor case connected to a rear end of the gear case, a handle portion attached to a rear end of the motor case, and a motor housed inside the motor case. The motor includes a stator, a rotor rotationally arranged inside the stator, and a fan in rotational connection with the rotor. At least one air intake is arranged at least one of the motor case or the handle portion near the rear end of the motor case. A power module including power switches and a heat sink is housed in at least one of the motor case or the handle portion near the rear end of the motor case such that rotation of the fan causes air flow to enter through the air intake and flow near the heat sink and through the motor.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: December 10, 2019
    Assignee: Black & Decker Inc.
    Inventors: Joseph P. Kelleher, William F. Gallagher, Sean R. Templeton, Mark R. Poetzl, Seth M. Robinson, Marcell E. Coates, Madhur M. Purohit, Timothy J. Seeley, Joshua M. Lewis
  • Patent number: 10452363
    Abstract: Techniques and mechanisms for conversion of code of a first type to bytecode. Apex provides various unique characteristics. When converting to bytecode, these characteristics are handled to provide bytecode functionality. Some of the unique characteristics of Apex include Autoboxing, SOQL, Properties, Comparisons, Modifiers, Code coverage mechanisms and Sharing mechanisms.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: October 22, 2019
    Assignee: salesforce.com, inc.
    Inventors: Gregory D. Fee, William J. Gallagher
  • Patent number: 10330111
    Abstract: In one exemplary embodiment, an airfoil for a turbine engine includes an airfoil that has pressure and suction sides and extends in a radial direction from a 0% span position at an inner flow path location to a 100% span position at an airfoil tip. The airfoil has a curve that corresponds to a relationship between a leading edge dihedral and a span position. The leading edge dihedral has a portion of the curve with a change in dihedral in the range of 90% to 100% span position of greater than 10°. A positive dihedral corresponds to suction side-leaning. A negative dihedral corresponds to pressure side-leaning.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: June 25, 2019
    Assignee: United Technologies Corporation
    Inventors: Scott C. Billings, Michael K. Gottschalk, William D. Owen, Edward J. Gallagher, Darryl Whitlow, Sue-Li Chuang, Mani Sadeghi
  • Publication number: 20190165260
    Abstract: In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode. The second insulating cover layer has an oxygen getter property.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 30, 2019
    Inventors: Chwen Yu, Shy-Jay Lin, William J. Gallagher
  • Patent number: 10276227
    Abstract: A method for verifying a write operation in a memory cell (e.g., a non-volatile memory cell) that includes performing a first read operation of the memory cell to measure a first current associated with the memory cell and comparing the measured first current associated with the memory cell to a first predetermined threshold current to determine whether the write operation changed the state of the memory cell. If the measured first current associated with the memory cell indicates the write operation did change the state of the memory cell the method further includes performing a second read operation of the memory cell to measure a second current associated with the memory cell and comparing the measured second current associated with the memory cell to a second predetermined threshold current to determine whether the write operation changed the state of the memory cell to the desired state or an intermediate state.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Der Chih, Chien-Ye Lee, Jenn-Jou Wu, Yi-Chieh Chiu, Yi-Chun Shih, William J. Gallagher
  • Patent number: 10217641
    Abstract: A GaN device is formed on a semiconductor substrate having a plurality of recessed regions formed in a surface thereof. A seed layer, optional buffer layer, and gallium nitride layer such as a carbon-doped gallium nitride layer are successively deposited within the recessed regions. Improved current collapse response of the GaN device is attributed to maximum length and width dimensions of the multilayer stack.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: February 26, 2019
    Assignees: International Business Machines Corporation, MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: William J. Gallagher, Marinus Johannes Petrus Hopstaken, Ko-Tao Lee, Tomas Palacios, Daniel Piedra, Devendra K. Sadana
  • Publication number: 20180315464
    Abstract: A method for verifying a write operation in a memory cell (e.g., a non-volatile memory cell) that includes performing a first read operation of the memory cell to measure a first current associated with the memory cell and comparing the measured first current associated with the memory cell to a first predetermined threshold current to determine whether the write operation changed the state of the memory cell. If the measured first current associated with the memory cell indicates the write operation did change the state of the memory cell the method further includes performing a second read operation of the memory cell to measure a second current associated with the memory cell and comparing the measured second current associated with the memory cell to a second predetermined threshold current to determine whether the write operation changed the state of the memory cell to the desired state or an intermediate state.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Yu-Der Chih, Chien-Ye Lee, Jenn-Jou Wu, Yi-Chieh Chiu, Yi-Chun Shih, William J. Gallagher
  • Patent number: 10043607
    Abstract: Present disclosure relates to magnetic materials, chips having magnetic materials, and methods of forming magnetic materials. In certain embodiments, magnetic materials may include a seed layer, and a cobalt-based alloy formed on seed layer. The seed layer may include copper, cobalt, nickel, platinum, palladium, ruthenium, iron, nickel alloy, cobalt-iron-boron alloy, nickel-iron alloy, and any combination of these materials. In certain embodiments, the chip may include one or more on-chip magnetic structures. Each on-chip magnetic structure may include a seed layer, and a cobalt-based alloy formed on seed layer. In certain embodiments, method may include: placing a seed layer in an aqueous electroless plating bath to form a cobalt-based alloy on seed layer. In certain embodiments, the aqueous electroless plating bath may include sodium tetraborate, an alkali metal tartrate, ammonium sulfate, cobalt sulfate, ferric ammonium sulfate and sodium borohydride and has a pH between about 9 to about 13.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Yu Luo, Lubomyr T. Romankiw, Joonah Yoon
  • Patent number: 10002919
    Abstract: An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: June 19, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Maurice Mason, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Patent number: 9996323
    Abstract: Execution of code in a multitenant runtime environment. A request to execute code corresponding to a tenant identifier (ID) is received in a multitenant environment. The multitenant database stores data for multiple client entities each identified by a tenant ID having one of one or more users associated with the tenant ID. Users of each of multiple client entities can only access data identified by a tenant ID associated with the respective client entity. The multitenant database is a hosted database provided by an entity separate from the client entities, and provides on-demand database service to the client entities. Source code corresponding to the code to be executed is retrieved from a multitenant database. The retrieved source code is compiled. The compiled code is executed in the multitenant runtime environment. The memory used by the compiled code is freed in response to completion of the execution of the compiled code.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: June 12, 2018
    Assignee: salesforce.com, inc.
    Inventors: Gregory D. Fee, William J. Gallagher
  • Publication number: 20180076275
    Abstract: An on-chip magnetic structure structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 15, 2018
    Inventors: Hariklia Deligianni, William J. Gallagher, Andrew J. Kellock, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Patent number: 9911602
    Abstract: A method and structure for integrating gallium nitride into a semiconductor substrate. The method may also include means for isolating the gallium nitride from the semiconductor substrate.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: March 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: William J. Gallagher, Effendi Leobandung, Devendra K. Sadana, Ghavam G. Shahidi
  • Publication number: 20180012953
    Abstract: An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material.
    Type: Application
    Filed: September 7, 2017
    Publication date: January 11, 2018
    Inventors: Hariklia Deligianni, William J. Gallagher, Maurice Mason, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Patent number: 9865673
    Abstract: An on-chip magnetic structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: January 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Andrew J. Kellock, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Publication number: 20170314136
    Abstract: Present disclosure relates to magnetic materials, chips having magnetic materials, and methods of forming magnetic materials. In certain embodiments, magnetic materials may include a seed layer, and a cobalt-based alloy formed on seed layer. The seed layer may include copper, cobalt, nickel, platinum, palladium, ruthenium, iron, nickel alloy, cobalt-iron-boron alloy, nickel-iron alloy, and any combination of these materials. In certain embodiments, the chip may include one or more on-chip magnetic structures. Each on-chip magnetic structure may include a seed layer, and a cobalt-based alloy formed on seed layer. In certain embodiments, method may include: placing a seed layer in an aqueous electroless plating bath to form a cobalt-based alloy on seed layer. In certain embodiments, the aqueous electroless plating bath may include sodium tetraborate, an alkali metal tartrate, ammonium sulfate, cobalt sulfate, ferric ammonium sulfate and sodium borohydride and has a pH between about 9 to about 13.
    Type: Application
    Filed: April 13, 2017
    Publication date: November 2, 2017
    Inventors: HARIKLIA DELIGIANNI, WILLIAM J. GALLAGHER, YU LUO, LUBOMYR T. ROMANKIW, JOONAH YOON
  • Publication number: 20170316855
    Abstract: Present disclosure relates to magnetic materials, chips having magnetic materials, and methods of forming magnetic materials. In certain embodiments, magnetic materials may include a seed layer, and a cobalt-based alloy formed on seed layer. The seed layer may include copper, cobalt, nickel, platinum, palladium, ruthenium, iron, nickel alloy, cobalt-iron-boron alloy, nickel-iron alloy, and any combination of these materials. In certain embodiments, the chip may include one or more on-chip magnetic structures. Each on-chip magnetic structure may include a seed layer, and a cobalt-based alloy formed on seed layer. In certain embodiments, method may include: placing a seed layer in an aqueous electroless plating bath to form a cobalt-based alloy on seed layer. In certain embodiments, the aqueous electroless plating bath may include sodium tetraborate, an alkali metal tartrate, ammonium sulfate, cobalt sulfate, ferric ammonium sulfate and sodium borohydride and has a pH between about 9 to about 13.
    Type: Application
    Filed: May 2, 2016
    Publication date: November 2, 2017
    Inventors: HARIKLIA DELIGIANNI, WILLIAM J. GALLAGHER, YU LUO, LUBOMYR T. ROMANKIW, JOONAH YOON
  • Patent number: 9793336
    Abstract: An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: October 17, 2017
    Assignee: INTERNATIONAL BUSIENSS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Maurice Mason, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Publication number: 20170294504
    Abstract: Disclosed are magnetic structures, including on-chip inductors comprising laminated layers comprising, in order, a barrier and/or adhesion layer, a antiferromagnetic layer, a magnetic growth layer, a soft magnetic layer, an insulating non-magnetic spacer, a soft magnetic layer, a magnetic growth later, an antiferromagnetic layer. Also disclosed are methods of making such structures.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 12, 2017
    Inventors: Hariklia Deligianni, William J. Gallagher, Eugene J, O'Sullivan, Naigang Wang
  • Publication number: 20170278557
    Abstract: A method for controlling a magnetic memory device is provided. The method includes: applying a first control signal and a second control signal to a ferromagnetic fixed layer and a ferromagnetic free layer of the magnetic memory device respectively, wherein a first voltage level of the first control signal is lower than a second voltage level of the second control signal; sensing a first current signal flowing through the magnetic memory device; and determining a logical state of a first data bit according to the first current signal.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 28, 2017
    Inventors: Yu-Der CHIH, Tien-Wei CHIANG, Chun-Jung LIN, Harry-Hak-Lay CHUANG, William J. GALLAGHER
  • Patent number: 9767878
    Abstract: A method for controlling a magnetic memory device is provided. The method includes: applying a first control signal and a second control signal to a ferromagnetic fixed layer and a ferromagnetic free layer of the magnetic memory device respectively, wherein a first voltage level of the first control signal is lower than a second voltage level of the second control signal; sensing a first current signal flowing through the magnetic memory device; and determining a logical state of a first data bit according to the first current signal.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: September 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANT LTD.
    Inventors: Yu-Der Chih, Tien-Wei Chiang, Chun-Jung Lin, Harry-Hak-Lay Chuang, William J. Gallagher