Abstract: A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive element and substantially lattice matched to the semiconductor material.

Abstract: A semiconductor apparatus includes a capacitor having a substrate, a conductive element and an insulator. The insulator comprises a substantially monocrystalline material having a relatively high dielectric constant. The semiconductor apparatus may further include a supplemental layer having a depletion zone, suitably comprised of a high-resistivity semiconductor material, for forming a voltage-variable capacitor. To facilitate the growth of the insulator and/or other layers, the various layers are suitably lattice matched. Further, the apparatus may include one or more interface layers to facilitate lattice-matching of the various layers.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying a monocrystalline layer of silicon formed on a low cost substrate, such as glass. The growth of the monocrystalline materials is accomplished by forming a compliant substrate for growing the monocrystalline materials. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon layer is taken care of by the amorphous interface layer.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline material spaced apart from the silicon wafer (102) by an amorphous interface layer (108) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of thin film pyroelectric devices (150) on a monocrystalline silicon substrate.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (204) on a silicon wafer (202). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (206) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: A semiconductor apparatus includes a capacitor having a substrate, a conductive element and an insulator. The insulator comprises a substantially monocrystalline material having a relatively high dielectric constant. The semiconductor apparatus may further include a supplemental layer having a depletion zone, suitably comprised of a high-resistivity semiconductor material, for forming a voltage-variable capacitor. To facilitate the growth of the insulator and/or other layers, the various layers are suitably lattice matched. Further, the apparatus may include one or more interface layers to facilitate lattice-matching of the various layers.

Abstract: Multijunction solar cell structures (100) including high quality epitaxial layers of monocrystalline semiconductor materials that are grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers are disclosed. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer. The accommodating buffer (104) layer is a layer of monocrystalline material spaced apart from the silicon wafer by an amorphous interface layer (112) of silicon oxide. The amorphous interface layer (112) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Multiple and varied accommodating buffer layers can be used to achieve the monolithic integration of multiple non-lattice matched solar cell junctions.

Abstract: A system of integrated circuits including a plurality of optical semiconductor devices formed in silicon substrates such that the devices optically communicate with one another. The optical semiconductor devices are preferably formed from compound semiconductor structures. Each substrate may be formed in a single plane.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a complaint substrate includes first growing a monocrystalline binary metal oxide material layer (14) on a substrate (12). The binary metal oxide material layer (14) is lattice matched to both the underlying substrate (12) and the overlying monocrystalline material layer (16).

Abstract: A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.

Abstract: A high quality semiconductor structure includes a monocrystalline substrate and a perovskite stack overlying the substrate. The perovskite stack may be formed of a first accommodating layer formed of a first perovskite oxide material having a first lattice constant. A second accommodating layer is formed on the first accommodating layer. The second accommodating layer is formed of a second perovskite oxide material having a second lattice constant which is different from the first lattice constant of the first accommodating layer. A monocrystalline material layer is formed overlying the second accommodating layer. A strain is effected at the interface between the perovskite stack and the substrate, at the interface between the perovskite stack and the monocrystalline material layer and/or at the interface between the first accommodating layer and the second accommodating layer. The strain reduces defects in the monocrystalline material layer and results in reduced Schottky leakage current.

Abstract: A hybrid integrated circuit is provided that has a monocrystalline substrate such as silicon and a compound semiconductor layer such as gallium arsenide or indium phosphide. An optical communications port may be formed on the hybrid integrated circuit. Electrical equipment may be provided that includes electrical components. At least a given one of the components may be a hybrid integrated circuit. Data used for the operation of one of the given integrated circuit may be provided to the given integrated circuit through the optical communications port on that integrated circuit. The data may be loaded rapidly in real time due to the wide bandwidth of the optical communications port.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (204) on a silicon wafer (202). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (206) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline material spaced apart from the silicon wafer (102) by an amorphous interface layer (108) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of thin film pyroelectric devices (150) on a monocrystalline silicon substrate.

Abstract: A fuel cell system and method of forming the fuel cell system including a base portion, formed of a singular body, and having a major surface. At least one fuel cell membrane electrode assembly is formed on the major surface of the base portion. A fluid supply channel including a mixing chamber is defined in the base portion and communicating with the fuel cell membrane electrode assembly for supplying a fuel-bearing fluid to the membrane electrode assembly. An exhaust channel including a water recovery and recirculation system is defined in the base portion and communicating with the membrane electrode assembly. The membrane electrode assembly and the cooperating fluid supply channel and cooperating exhaust channel forming a single fuel cell assembly.

Abstract: A thermoelectric power generator and method of generating thermoelectric power in a steam power cycle utilizing latent steam heat including a condenser, a heat source, such as steam, and at least one thermoelectric module. The condenser includes a plurality of condenser tubes each having included therein a heat extractor. The heat source is in communication with the condenser and is characterized as providing thermal energy to the condenser. The at least one thermoelectric module, including a plurality of thermoelectric elements, is positioned in communication with at least one of the plurality of condenser tubes so that thermal energy flows through the thermoelectric elements thereby generating electrical power.

Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.

Abstract: An apparatus (100) and method (800) for forming high quality epitaxial layers of monocrystalline materials grown overlying monocrystalline substrates (310) such as large silicon wafers is provided. The apparatus (100) includes at least two deposition chambers (110) and (140) that are coupled together. The first chamber (110) is used to form an accommodating buffer layer (320) on the substrate (310) and the second (140) is used to form a layer of monocrystalline material (330) overlying the accommodating buffer layer (320).

Abstract: A field effect transistor with an enhanced dielectric constant gate insulator including spaced apart source and drain terminals positioned on a substrate structure so as to define a gate area therebetween. A layer of laterally strained, enhanced dielectric constant dielectric material is epitaxially grown on the substrate structure in the gate area, and a gate metal is positioned on the layer of dielectric material to form a gate terminal in the gate area.

Abstract: A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.