Patents by Inventor William Leong

William Leong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040024217
    Abstract: In its several embodiments, this invention discloses novel processes to prepare the compounds of formula II and formula IV: 1
    Type: Application
    Filed: March 27, 2003
    Publication date: February 5, 2004
    Applicant: Schering Corporation
    Inventors: William Leong, Minzhang Chen, Bosco A. D'sa, Man Zhu, Tong Xiao, Xiongwei Shi, Suhan Tang, Dinesh Gala, Andrew J. Goodman, Christopher M. Nielsen, Gary M. Lee, Juan A. Gamboa, Andrew D. Jones
  • Publication number: 20030139446
    Abstract: In one embodiment, the present invention discloses a process to directly prepare an unequal ratio of specific, preferred rotamer or rotameric pair of an acid salt from a basic compound, by creative choice of a solvent medium. The process is particularly useful in preparing desired rotamers of pharmaceutically useful salts.
    Type: Application
    Filed: November 26, 2002
    Publication date: July 24, 2003
    Applicant: Schering Corporation
    Inventors: Minzhang Chen, Bosco D'sa, William Leong, Suhan Tang
  • Publication number: 20020130681
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks (“LABs”). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Application
    Filed: August 22, 2001
    Publication date: September 19, 2002
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 6396304
    Abstract: A programmable logic array integrated circuit device has logic regions grouped in blocks, which are in turn grouped in super-blocks. The super-blocks are disposed on the device in a two-dimensional array of intersecting rows and columns. Global conductors are associated with each row and column. Super-block feeding conductors associated with each super-block feed signals from the global conductors to any logic region in the super-block. Local feedback conductors feed back logic region output signals to all logic regions in a block. The super-block feeding conductors are also used to interconnect the logic regions in a super-block so that the global conductors do not have to be used for that purpose.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: May 28, 2002
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, Cameron McClintock, William Leong
  • Publication number: 20010043083
    Abstract: A programmable logic array integrated circuit device has logic regions grouped in blocks, which are in turn grouped in super-blocks. The super-blocks are disposed on the device in a two-dimensional array of intersecting rows and columns. Global conductors are associated with each row and column. Super-block feeding conductors associated with each super-block feed signals from the global conductors to any logic region in the super-block. Local feedback conductors feed back logic region output signals to all logic regions in a block. The super-block feeding conductors are also used to interconnect the logic regions in a super-block so that the global conductors do not have to be used for that purpose.
    Type: Application
    Filed: December 9, 1999
    Publication date: November 22, 2001
    Inventors: RICHARD G. CLIFF, CAMERON MCCLINTOCK, WILLIAM LEONG
  • Patent number: 6278291
    Abstract: A programmable logic array device has a plurality of logic regions and conductors for conveying signals between the logic regions. Conductors of several different lengths are provided so that most connections between logic regions can be made using conductors which are close to the length required and not wastefully much longer than that length.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: August 21, 2001
    Assignee: Altera Corporation
    Inventors: Cameron McClintock, William Leong, Richard G. Cliff, Bahram Ahanin
  • Patent number: 6134173
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: October 17, 2000
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. McClintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 6128692
    Abstract: A programmable logic array integrated circuit device has a relatively large block of programmable memory cells in addition to the usual programmable logic modules and the usual programmable interconnection conductor network. In order to simplify the circuitry associated with the large block, and especially the circuitry for addressing that block during programming and/or verification of the device, the address decoder that is normally used to address the block during use of the device to perform logic is also used during programming and/or verification. During programming and/or verification a counter or other similar coded address signal generating circuitry is used to supply address information to the decoder.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: October 3, 2000
    Assignee: Altera Corporation
    Inventors: Chiakang Sung, Wanli Chang, Joseph Huang, Richard G. Cliff, L. Todd Cope, William Leong, deceased, by Louis Leong, legal representative
  • Patent number: 6127846
    Abstract: A programmable logic array device has a plurality of logic regions and conductors for conveying signals between the logic regions. Conductors of several different lengths are provided so that most connections between logic regions can be made using conductors which are close to the length required and not wastefully much longer than that length.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: October 3, 2000
    Assignee: Altera Corporation
    Inventors: Cameron McClintock, William Leong, Richard G. Cliff, Bahram Ahanin
  • Patent number: 6064599
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs") The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: May 16, 2000
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 6028808
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: February 22, 2000
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 6023439
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: February 8, 2000
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. McClintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 6018490
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: January 25, 2000
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 5900743
    Abstract: A programmable logic array device has a plurality of logic regions and conductors for conveying signals between the logic regions. Conductors of several different lengths are provided so that most connections between logic regions can be made using conductors which are close to the length required and not wastefully much longer than that length.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: May 4, 1999
    Assignee: Altera Corporation
    Inventors: Cameron McClintock, William Leong, Richard G. Cliff, Bahram Ahanin
  • Patent number: 5883850
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: March 16, 1999
    Assignee: Altera Corporation
    Inventors: Fung Fung Lee, Richard G. Cliff, L. Todd Cope, Cameron R. McClintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 5848005
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: December 8, 1998
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. McClintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 5838628
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: November 17, 1998
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 5828229
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: October 27, 1998
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron McClintock, William Leong, James Allen Watson, Joseph Huang, Bahram Ahanin, Chiakang Sung, Wanli Chang
  • Patent number: 5812479
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: September 22, 1998
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin
  • Patent number: 5764583
    Abstract: A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: June 9, 1998
    Assignee: Altera Corporation
    Inventors: Richard G. Cliff, L. Todd Cope, Cameron R. McClintock, William Leong, James A. Watson, Joseph Huang, Bahram Ahanin