Abstract: A physical layer device for a network interface includes a reconciliation device that includes a first interface that outputs data. A physical coding sublayer (PCS) device communicates with the first interface and includes an encoder that encodes the data to produce an encoded data block including an offset portion and n data blocks, each including at least one of data portions and control code portions. The encoder is capable of locating the control code portions within any of the n data blocks based on the offset portion.

Abstract: A physical layer of a first network device is connected to cable of an Ethernet network. A digital signal processor (DSP) is connected to the cable. The DSP receives and decodes first signals on the cable from a second device. The DSP codes and transmits second signals to the second device on the cable. An autonegotiation controller is connected to the DSP and includes a cable detector that determines a first number of pairs of twisted pair wires of the cable that are operable. The autonegotiation controller also includes a speed adjuster that masks an advertised speed of the first device when the cable detector determines that the first number is less than the number required for a requested speed of the first device.

Abstract: A network media selection system comprises a memory that stores priority information for each of a plurality of ports and a media selector module that communicates with the memory, that receives activity signals and link signals from the plurality of ports, and that uses the activity signals, the link signals, and the priority information to generate enable signals for the plurality of ports. A respective port attempts to establish a link when a corresponding one of the enable signals is in a first state, and the respective port detects physical layer activity when a corresponding one of the enable signals is in a second state. The media selector module selectively sets enable signals to the second state for all of the plurality of ports other than a target port, which has the highest priority and has generated a link signal.

Abstract: The present invention relates to methods and apparatus for performing reverse auto-negotiation, in which one network device establishes a link with another network device at a preferred operating mode (e.g., the lowest speed) common to both devices without linking twice. The physical layer of a local network device (local PHY) may stall the normal auto-negotiation process with the link partner, while receiving the abilities of the link partner. The local PHY may then transmit a signal having only the preferred common operating mode (e.g., the lowest speed) encoded within. The link partner may then conclude that the local PHY is only capable of the preferred common operating mode (e.g., the lowest speed) and a link between the two devices may be established at that common mode.

Abstract: An apparatus and method for laser probing of a DUT at very high temporal resolution is disclosed. The system includes a CW laser source, a beam optics designed to point two orthogonally polarized beams at the same location on the DUT, optical detectors for detecting the reflected beams, collection electronics, and an oscilloscope. The beam optics defines a common-path polarization differential probing (PDP) optics. The common-path PDP optics divides the laser beam into two beams of orthogonal polarization. Due to the intrinsic asymmetry of a CMOS transistor, the interaction of the beams with the DUT result in different phase modulation in each beam. This difference can be investigated to study the response of the DUT to the stimulus signal.

Abstract: A physical layer device of a network device comprises a physical coding sublayer (PCS) device encodes data to produce an encoded data block. A scrambler communicates with the PCS device and scrambles the encoded data block to produce a scrambled data block. A sync adder adds a sync header to the scrambled data block. The sync header has a first state when the scrambled data block only includes data portions. The sync header has a second state when the scrambled data block includes at least one control code portion.

Abstract: A rate adaptation layer (RAL) module for converting from a first interface operating at a first rate to a second interface operating at a second rate comprises first and second input/output (I/O) modules that communicate with the first and second interfaces, respectively. A repeater module receives symbols from the first I/O module, and transmits the symbols n times to the second I/O module, where n is determined by the first and second rates. A pull-down module receives symbols from the second I/O module and selectively extracts symbols to be communicated to the first I/O module.

Abstract: A method for communicating network data of varying speeds comprises establishing a plurality of signal interconnections; storing a first mapping of XGMII signals onto the plurality of signal interconnections; storing a second mapping of GMII signals onto the plurality of signal interconnections; and storing a third mapping of MII signals onto the plurality of signal interconnections. Ones of the plurality of signal interconnections are mapped by each of the first, second, and third mappings. The method further comprises selecting one of the first, second, and third mappings and transmitting the network data over the plurality of signal interconnections using the selected one of the first, second, and third mappings.

Abstract: A device for controlling interpacket gaps in a data stream of packets. A receiver to receive the data stream of packets. A controller to monitor the data stream of packets and to selectively delete interpacket gaps. A transmit buffer to buffer packet data in the data stream of packets flowing from the controller.

Abstract: A physical layer device includes a cable tester that determines a cable status of a cable and that includes a test module. The test module transmits a test pulse on the cable, measures a reflection amplitude, calculates a cable length, and determines the cable status based on the measured amplitude and the calculated cable length. An insertion loss estimator communicates with the cable tester, and estimates insertion loss of the cable based at least in part on a feedback equalizer gain.

Abstract: An autonegotiation circuit for gigabit per second Ethernet networks includes a switch with 1000BASE-X media. A gigabit interface connector (GBIC) module connects the switch to the device and allows autonegotiation. The switch includes a first GBIC interface with a transmitter and a receiver. The GBIC module includes a second GBIC interface with a transmitter and a receiver and a first copper interface with a transmitter and a receiver. The device includes a second copper interface with a transmitter and a receiver. The GBIC module waits for non-zero configuration ordered sets from the switch. The GBIC module stores configuration information from the switch and then sends FLP bursts to the device. 1000BASE-T autonegotiation is completed and a link is established between the GBIC module and the device. The GBIC module stores second configuration information from the device. Then, the GBIC module completes 1000BASE-X autonegotiation and establishes a link.

Abstract: A network comprising a first network device including a first physical layer device with a receiver and a first autonegotiation circuit having an ability detect state and including a bypass timer that determines a predetermined period, a first medium, and a second network device that includes a second physical layer device and that communicates over the first medium with the first network device. The first network device enables autonegotiation bypass and establishes a link with the second network device after the predetermined period during which a link between the first and second network devices is not up, and the receiver of the first physical layer device is in sync.

Abstract: Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.

Abstract: An interpolator testing system comprises an interpolator that generates M clock signals having phase shifts in increments of 360/M degrees relative to a reference clock signal and that outputs one of the M clock signals as a recovered clock signal. A recovered clock counter counts an attribute of the recovered clock signal, wherein the interpolator sequentially selects the M clock signals N times, wherein M and N are integers greater than one.

Abstract: A physical-layer device (PHY) having corresponding methods comprises: a data rate module to select a data rate divisor N, where N is at least one of a positive integer, or a real number greater than, or equal to, 1; and a PHY core comprising a PHY transmit module to transmit first signals a data rate of M/N Gbps, and a PHY receive module to receive second signals at the data rate of MIN Gbps; wherein the first and second signals conform to at least one of 1000BASE-T, wherein M=1, and 10GBASE-T, wherein M=10.

Abstract: A physical layer device comprises a mode selector that selects a mode. A clock selects a clock frequency from T clock frequencies based on the mode. A converter module selects one of N mapping functions based on the mode and converts an n-bit input to an m-bit output based on the selected one of the N mapping functions. A scrambler module scrambles the m-bit output or passes the m-bit output unchanged based on the mode. An encoding module modulates the m-bit output based on the selected clock frequency and one of M modulation modes selected based on the mode, where T, n, m, N and M are integers greater than one and n is not equal to m.

Abstract: A transmit path in a physical layer device comprises a first transmit encoding device that has N outputs, that receives a first data stream at a first data rate and that performs a first type of encoding on the first data stream. A second transmit encoding device has an output, receives a second data stream at a second data rate and performs a second type of encoding on the second data stream. The first data rate is N times the second data rate. An output selector has a first set of N inputs that communicates with the N outputs of the first transmit encoding device, a second set of N inputs that communicate with the output of the second transmit encoding device and N outputs. The output selector selectively connects one of the first and second sets of N inputs to the N outputs.

Abstract: A self-reparable semiconductor includes multiple functional units that perform the same function and that include sub-functional units. The semiconductor includes one or more full or partial spare functional units that are integrated into the semiconductor. If a defect in a sub-functional unit is detected, then that sub-functional unit is switched out and replaced with a sub-functional unit in the full or partial spare functional unit. The reconfiguration is realized with switching devices that are associated with the sub-functional units. Defective functional or sub-functional units can be detected after assembly, during power up, periodically during operation, and/or manually.

Abstract: A network device that operates in first and second serial gigabit interface modes involving data speed translation comprising a medium access control (MAC) device that transmits idle order sets. A physical layer (PHY) device receives the idle order sets and that switches from the first serial gigabit interface mode to the second serial gigabit interface mode if a first predetermined number of consecutive idle order sets are equal to a first idle order set.

Abstract: A medium access control (MAC) device comprising an encoder that encodes a transmit control signal including one of a transmit enable signal in one half cycle of a clock signal and a transmit error signal in another half cycle of the clock signal. A control signal transmitter transmits the encoded transmit control signal. A data signal transmitter selectively transmits a transmit data signal including signaling data based on states of the transmit enable signal and the transmit error signal during the clock cycle.