Patents by Inventor William R. Richards

William R. Richards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12113106
    Abstract: Devices and methods for providing a power transistor structure with a shallow source region include implanting a dopant of a first dopant polarity into a drift region on a source side of a gate structure to form a body region, the body region being self-aligned to, and extending under, the gate structure, and producing a shallow body region wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region and suppresses triggering of a parasitic bipolar. A retrograde body well, of the first dopant polarity, may be disposed beneath, and noncontiguous with, the shallow self-aligned body region, wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region. A variety of power transistor structures are produced from such devices and methods.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: October 8, 2024
    Assignees: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Manoj Chandrika Reghunathan, Stefan Eisenbrandt, Christoph Ellmers
  • Patent number: 11646371
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 9, 2023
    Assignees: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Publication number: 20230054381
    Abstract: Devices and methods for providing a power transistor structure with a shallow source region include implanting a dopant of a first dopant polarity into a drift region on a source side of a gate structure to form a body region, the body region being self-aligned to, and extending under, the gate structure, and producing a shallow body region wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region and suppresses triggering of a parasitic bipolar. A retrograde body well, of the first dopant polarity, may be disposed beneath, and noncontiguous with, the shallow self-aligned body region, wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region. A variety of power transistor structures are produced from such devices and methods.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 23, 2023
    Applicants: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M DOLNY, William R RICHARDS, Manoj Chandrika Reghunathan, Stefan Eisenbrandt, Christoph Ellmers
  • Patent number: 11522053
    Abstract: Devices and methods for providing a power transistor structure with a shallow source region include implanting a dopant of a first dopant polarity into a drift region on a source side of a gate structure to form a body region, the body region being self-aligned to, and extending under, the gate structure, and producing a shallow body region wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region and suppresses triggering of a parasitic bipolar. A retrograde body well, of the first dopant polarity, may be disposed beneath, and noncontiguous with, the shallow self-aligned body region, wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region. A variety of power transistor structures are produced from such devices and methods.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: December 6, 2022
    Assignees: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M. Dolny, William R. Richards, Manoj Chandrika Reghunathan, Stefan Eisenbrandt, Christoph Ellmers
  • Publication number: 20220254914
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Applicants: Amplexia, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M DOLNY, William R RICHARDS, JR.
  • Publication number: 20220181444
    Abstract: Devices and methods for providing a power transistor structure with a shallow source region include implanting a dopant of a first dopant polarity into a drift region on a source side of a gate structure to form a body region, the body region being self-aligned to, and extending under, the gate structure, and producing a shallow body region wherein the source side hybrid contact mitigates punch through of the shallow self-aligned body region and suppresses triggering of a parasitic bipolar. A retrograde body well, of the first dopant polarity, may be disposed beneath, and noncontiguous with, the shallow self-aligned body region, wherein the retrograde body well improves the electric field profile of the shallow self-aligned body region. A variety of power transistor structures are produced from such devices and methods.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 9, 2022
    Applicants: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M. DOLNY, William R. RICHARDS, Manoj Chandrika Reghunathan, Stefan Eisenbrandt, Christoph Ellmers
  • Patent number: 11322611
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 3, 2022
    Assignees: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Publication number: 20210134999
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 6, 2021
    Applicants: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan TONER, Zhengchao LIU, Gary M DOLNY, William R RICHARDS, JR.
  • Patent number: 10892362
    Abstract: A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: January 12, 2021
    Assignees: Silicet, LLC, X-FAB Global Services GmbH
    Inventors: Brendan Toner, Zhengchao Liu, Gary M Dolny, William R Richards, Jr.
  • Patent number: 10511303
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: December 17, 2019
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Patent number: 10510869
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: December 17, 2019
    Assignee: SILICET, LLC
    Inventors: Gary M. Dolny, William R. Richards, Jr., Randall Milanowski
  • Patent number: 10036813
    Abstract: An apparatus and method of verifying the trustworthiness of position information from an onboard tracking system on an aircraft. An onboard tracking system message comprising onboard tracking system position information indicating a first position of the aircraft is generated by the onboard tracking system and transmitted to an off board aircraft tracking system via a communications satellite in a satellite communications system. The satellite communications system adds a header comprising transmitter position information identifying a second position for transmission of the onboard tracking system message received by the communications satellite to the onboard tracking system message to form a message. The message is received from the satellite communications system by the off board aircraft tracking system and the first position from the onboard tracking system message is compared to the second position from the header to determine whether the onboard tracking system position information is trustworthy.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: July 31, 2018
    Assignee: The Boeing Company
    Inventors: Siobvan M. Nyikos, Arun Ayyagari, Ted Eigle, William R. Richards, Tracy L. Woodward, Bernell R. McCormick
  • Publication number: 20180212041
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Application
    Filed: March 21, 2018
    Publication date: July 26, 2018
    Applicant: Silicet, LLC
    Inventors: Gary M. DOLNY, William R. RICHARDS, JR., Randall MILANOWSKI
  • Patent number: 9947787
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 17, 2018
    Assignee: SILICET, LLC
    Inventors: Gary M. Dolny, William R. Richards, Jr., Randall Milanowski
  • Publication number: 20180041203
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Application
    Filed: September 26, 2017
    Publication date: February 8, 2018
    Inventors: Bogdan M. Duduman, Anthony G.P. Marini, William R. Richards, JR., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Patent number: 9841001
    Abstract: A banded turbine configuration has an integral outer band support structure capable of providing two point simple support for a multiplicity of blades. A large scale vertical array has a set of twelve 23 m-diameter banded turbines with up to nine blades and resting on an Open Web Steel Joist (OWSJ) platform. The banded turbine configuration is supported off of a main shaft hub assembly, which is supported by forward and aft pillow block bearing assemblies. The banded turbine allows for a protective screen for bird- and bat-kill prevention. Each banded turbine employs DC alternators to provide a switchable output which is subsequently fed to a dedicated set of high efficiency grid-compatible solid state invertors or, alternatively, to energy storage.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: December 12, 2017
    Inventor: William R. Richards
  • Publication number: 20170323970
    Abstract: Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 9, 2017
    Applicant: Silicet, LLC
    Inventors: Gary M. DOLNY, William R. RICHARDS, JR., Randall MILANOWSKI
  • Patent number: 9774322
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: September 26, 2017
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Publication number: 20170139049
    Abstract: An apparatus and method of verifying the trustworthiness of position information from an onboard tracking system on an aircraft. An onboard tracking system message comprising onboard tracking system position information indicating a first position of the aircraft is generated by the onboard tracking system and transmitted to an off board aircraft tracking system via a communications satellite in a satellite communications system. The satellite communications system adds a header comprising transmitter position information identifying a second position for transmission of the onboard tracking system message received by the communications satellite to the onboard tracking system message to form a message. The message is received from the satellite communications system by the off board aircraft tracking system and the first position from the onboard tracking system message is compared to the second position from the header to determine whether the onboard tracking system position information is trustworthy.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Inventors: Siobvan M. Nyikos, Arun Ayyagari, Ted Eigle, William R. Richards, Tracy L. Woodward, Bernell R. McCormick
  • Patent number: 9139921
    Abstract: An Alkaline Electrolyzer Cell Configuration (AECC) has a hydrogen half cell; an oxygen half cell; a GSM (Gas Separation Membrane); two inner hydrogen half cell spacer screens; an outer hydrogen half cell spacer screen; a hydrogen electrode; two inner oxygen half cell spacer screens; an outer oxygen half cell spacer screen; and an oxygen electrode. The hydrogen half cell includes the hydrogen electrode which is located between said two inner hydrogen half cell spacer screens and said outer hydrogen half cell spacer screen. The oxygen half cell includes the oxygen electrode which is located between said two inner oxygen half cell spacer screens and said outer oxygen half cell spacer screen. The GSM is provided between said two inner hydrogen half cell spacer screens of the hydrogen half cell and said two inner oxygen half cell spacer screens of the oxygen half cell to from the electrolyzer.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: September 22, 2015
    Inventors: William R. Richards, Alan L. Volker