Abstract: Techniques for managing single sign-on are provided. in some examples, single sign-on functionality may be provided for use on mobile devices by utilizing mobile applications, cloud applications, and/or other web-based applications. For example, a mobile application or mobile web browser may request to authenticate with or access one or more service providers. Authentication credentials may be requested from a user of the mobile device to facilitate such authentication and/or access. Based at least in part on a successful log-in, access to server resources from other applications on the same mobile device may be provided without successive or repetitive credential requests to the user.

Abstract: A calibrating Analog-to-Digital Converter (ADC) has an X-side array with binary-weighted capacitors that connect to an X-side line and a Y-side array connected to a Y-side line. Each array has binary-weighted capacitors from a most-significant-bit (MSB) to a least-significant-bit (LSB), but the LSB capacitor is duplicated as a termination capacitor and a middle capacitor between upper and lower groups is also duplicated as a surrogate capacitor. During calibration, lower array capacitors are switched low while the upper capacitors are driven by a thermometer-code value on both X and Y arrays. The thermometer value is inverted to the X-array but remains uninverted on the Y array. The lower array bits are tested to final a calibration value that has X and Y side voltages balanced.

Abstract: A planar light circuit may be mounted in the housing a one-point mounting. The one-point mounting may reduce the tendency of thermal deformations in the housing to be transmitted to the planar light circuit.

Abstract: Various embodiments include large cores fibers that can propagate few modes or a single mode while introducing loss to higher order modes. Some of these fibers are holey fibers that comprising cladding features such as air-holes. Additional embodiments described herein include holey rods. The rods and fibers may be used in many optical systems including optical amplification systems, lasers, short pulse generators, Q-switched lasers, etc. and may be used for example for micromachining.

Abstract: Various types of holey fiber provide optical propagation. In various embodiments, for example, a large core holey fiber comprises a cladding region formed by large holes arranged in few layers. The number of layers or rows of holes about the large core can be used to coarse tune the leakage losses of the fundamental and higher modes of a signal, thereby allowing the non-fundamental modes to be substantially eliminated by leakage over a given length of fiber. Fine tuning of leakage losses can be performed by adjusting the hole dimension and/or the hole spacing to yield a desired operation with a desired leakage loss of the fundamental mode. Resulting holely fibers have a large hole dimension and spacing, and thus a large core, when compared to traditional fibers and conventional fibers that propagate a single mode. Other loss mechanisms, such as bend loss and modal spacing can be utilized for selected modes of operation of holey fibers. Other embodiments are also provided.

Abstract: A pre-amplifier circuit can be cascaded and drive a latch for use in a precision analog-to-digital converter (ADC). The pre-amplifier has a main section and a feedback section connected by feedback resistors that do not produce voltage drops in the main section. Offset is stored on offset capacitors during an autozeroing phase and isolated by transmission gates during an amplifying phase. The offset capacitors drive the gates of feedback transistors that drive output nodes in the main section. Autozeroing sink transistors in the feedback section operate in the linear region while current sink transistors in the main section operate in the saturated region. Kickback-charge isolation transistors may be added for charge isolation. The output may also be equalized by an equalizing transmission gate. A very low power-supply voltage is supported even for high-speed operation with offset cancellation, due to the folded feedback resistor arrangement.

Abstract: The present invention relates to an ultrasound imaging system in which the scan head includes a beamformer circuit that performs far field subarray beamforming or includes a sparse array selecting circuit that actuates selected elements. When using a hierarchical two-stage or three-stage beamforming system, three dimensional ultrasound images can be generated in real-time. The invention further relates to flexible printed circuit boards in the probe head. The invention furthermore relates to the use of coded or spread spectrum signalling in ultrasound imaging systems. Matched filters based on pulse compression using Golay code pairs improve the signal-to-noise ratio thus enabling third harmonic imaging with suppressed sidelobes. The system is suitable for 3D full volume cardiac imaging.

Abstract: A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.

Abstract: Various embodiments include large cores fibers that can propagate few modes or a single mode while introducing loss to higher order modes. Some of these fibers are holey fibers that comprising cladding features such as air-holes. Additional embodiments described herein include holey rods. The rods and fibers may be used in many optical systems including optical amplification systems, lasers, short pulse generators, Q-switched lasers, etc. and may be used for example for micromachining.

Abstract: The transmission of buffered data is coordinated between a storage medium and a host in response to a request from the host. One or more blocks of data are transferred from the storage medium to a buffer memory. One or more frames of data are transmitted from the buffer memory to the host, wherein the number of blocks ending in the frame is recorded in a blocks/frame register, and possibly also in a block count accumulator register. Buffer release pulses for releasing buffer space in memory are sent to the buffer memory, based on the number of blocks in the blocks/frame register, or the number of blocks accumulated in the block count accumulator register when a signal is received from the host. A pointer which points to the last block of data successfully transferred is updated in accordance with the buffer release pulses.

Abstract: A flexible shielded cable is disclosed. The cable may include a plurality of conductors formed on a common base, a dielectric material disposed about the plurality of conductors, and a shielding material disposed adjacent the dielectric material. At least one of the plurality of conductors may include an unshielded portion not overlaid by the shielding material and at least one of the plurality of conductors may include a shielded portion overlaid by the shielding material.

Abstract: Various embodiments include large cores fibers that can propagate few modes or a single mode while introducing loss to higher order modes. Some of these fibers are holey fibers that comprising cladding features such as air-holes. Additional embodiments described herein include holey rods. The rods and fibers may be used in many optical systems including optical amplification systems, lasers, short pulse generators, Q-switched lasers, etc. and may be used for example for micromachining.

Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.

Abstract: A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.

Abstract: A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.

Abstract: Various embodiments include large cores fibers that can propagate few modes or a single mode while introducing loss to higher order modes. Some of these fibers are holey fibers that comprising cladding features such as air-holes. Additional embodiments described herein include holey rods. The rods and fibers may be used in many optical systems including optical amplification systems, lasers, short pulse generators, Q-switched lasers, etc. and may be used for example for micromachining.

Abstract: An execution queue stores a write command from the host in response to issuance of the write command from the host, and is removed from the execution queue in response to a signal indicating that data designated by the write command has been written to the hard disk. A holding queue stores the write command removed from the execution queue. In response to the command being stored in the holding queue, a request is issued for an acknowledgment from the host. The write command is removed from the holding queue in response to the acknowledgment being received from the host. An outgoing queue stores the write command removed from the holding queue for deletion. The queues are controlled by queue management hardware, the request is issued by the queue management hardware, and the signal and acknowledgment are received by the queue management hardware.

Abstract: A hybrid Analog-to-Digital Converter (ADC) has a binary-weighted capacitor array and a sub-voltage capacitor array that are coupled together by a coupling capacitor. The sub-voltage capacitor array uses a minimum capacitor size that matches the minimum capacitor size of the binary-weighted capacitor array. The coupling capacitor is double the minimum size and reduces a voltage effect on a charge sharing line by half. Second coupling capacitors in the sub-voltage capacitor array each reduce the voltage effect by half, so that first, second, and third sub-voltage capacitors in the sub-voltage capacitor array produce ½, ¼, and ? voltage swings using the minimum size capacitance. Only MSB capacitors in the binary-weighted capacitor array sample the analog input voltage. During conversion, MSB's from a Successive-Approximation-Register (SAR) are applied to binary-weighted capacitors while LSB's are applied to sub-voltage capacitors.

Abstract: A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.

Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.