Patents by Inventor William Y. Chen

William Y. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10289394
    Abstract: Utilities for use in generation of a single executable (e.g., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively generate machine code for each of one or more particular C++ functions for each of a plurality of different processor versions and/or architectures in a “multi-version mode” or “multi-architecture mode” to allow such functions to perform better under different processor versions or architectures, avoid the need to maintain multiple entire object code sets for different processor versions or architectures, and allow for maintenance of a substantially complete C++ code mechanism.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: May 14, 2019
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Alfred Huang, William Y. Chen
  • Publication number: 20180101370
    Abstract: Utilities for use in generation of a single executable (e.g., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively generate machine code for each of one or more particular C++ functions for each of a plurality of different processor versions and/or architectures in a “multi-version mode” or “multi-architecture mode” to allow such functions to perform better under different processor versions or architectures, avoid the need to maintain multiple entire object code sets for different processor versions or architectures, and allow for maintenance of a substantially complete C++ code mechanism.
    Type: Application
    Filed: October 11, 2016
    Publication date: April 12, 2018
    Inventors: ALFRED HUANG, WILLIAM Y. CHEN
  • Patent number: 9766911
    Abstract: Aspects of the invention are directed to a systems and methods for operating a non-native binary in dynamic binary translation environment. In accordance with an embodiment, there is provided a computer program product in a computer readable medium. The product includes program code for receiving a non-native binary in a computer readable medium and program code for translating the non-native binary. Additionally, the product includes program code for executing the translated non-native binary, the non-native binary including one or more threads, and program code for pausing execution of the translated non-native binary. The product also includes program code for providing guest instruction boundary information to a monitoring process and program code for analyzing a state of each thread of the translated non-native binary. Moreover, the product includes program code for fast-forwarding at least one thread so that its state is consistent with the guest instruction boundary.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: September 19, 2017
    Assignee: ORACLE AMERICA, INC.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Patent number: 9146831
    Abstract: A method of reproducing runtime environment for debugging an application is disclosed. The method includes accessing an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of a plurality of events, the plurality of actions, and a time mark of occurrence for each of the plurality of actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: September 29, 2015
    Assignee: Oracle America, Inc.
    Inventors: William Y. Chen, Jiwei Lu
  • Publication number: 20140089903
    Abstract: A method of reproducing runtime environment for debugging an application is disclosed. The method includes accessing an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of a plurality of events, the plurality of actions, and a time mark of occurrence for each of the plurality of actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file.
    Type: Application
    Filed: November 27, 2013
    Publication date: March 27, 2014
    Applicant: Oracle America, Inc.
    Inventors: William Y. Chen, Jiwei Lu
  • Patent number: 8627302
    Abstract: A method of reproducing runtime environment for debugging an application includes reading an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of events, actions, and a time mark of occurrence for each of the actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file. Further, the method includes running the application, attaching an optimizer, and triggering each of the actions to occur at a time mark of occurrence associated with each of the actions. Then, each of the actions and associated events is analyzed by comparing the events produced by running the application with the events in the optimizer file. If a fault is produced by the triggering, a debugger is invoked to analyze the fault.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: January 7, 2014
    Assignee: Oracle America, Inc.
    Inventors: William Y. Chen, Jiwei Lu
  • Patent number: 8521760
    Abstract: Techniques for selectively translating resource requests from a program running on a computer system are disclosed. The resource request may be a request to access a file, library file, API, etc. The resource request may be a system call or library call. The computer program may be non-native to the computer system. Translation of resource requests may occur within the operating system or outside it. A resource request containing a reference to a first path and file name may be selectively translated by altering the resource request to contain a reference to a second path and file name. After selectively translating a request, he request is caused to be serviced. A resource request may be serviced by forwarding it to an operating system, and a result may be sent back to the program.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: August 27, 2013
    Assignee: Oracle America, Inc.
    Inventors: Abhinav Das, William Y. Chen, Jiwei Lu, Chandramouli Banerjee
  • Patent number: 8473930
    Abstract: A method for executing non-native binaries on a host computer architecture comprises receiving the guest executable binary into a computer readable medium. The guest executable binary is executed on the host computer architecture by translating the guest executable binary into a translated executable binary. Each instruction of the translated executed binary is then executed on the host computer architecture. Signals are responded to by placing signal information on a signal queue and deferring signal handling until a safe point is reached. A computer system implementing the method is also provided.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: June 25, 2013
    Assignee: Oracle America, Inc.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Patent number: 8346531
    Abstract: A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable binary includes a mutex lock encoded instructions for implementing a mutex lock. The guest executable binary is then executed on the host computer architecture by first translating the guest executable binary to a translated executable binary. The encoded instructions for implementing a mutex lock are translated by mapping the mutex lock to an instance of a compound mutex lock data structure. A computer system implementing methods for executing non-native binaries on a host computer architecture is also provided.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: January 1, 2013
    Assignee: Oracle America, Inc.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Patent number: 8230402
    Abstract: A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.
    Type: Grant
    Filed: September 30, 2007
    Date of Patent: July 24, 2012
    Assignee: Oracle America, Inc.
    Inventors: William Y. Chen, Jiwei Lu, Geetha K. Vallabhaneni
  • Publication number: 20100274551
    Abstract: Aspects of the invention are directed to a systems and methods for operating a non-native binary in dynamic binary translation environment. In accordance with an embodiment, there is provided a computer program product in a computer readable medium. The product includes program code for receiving a non-native binary in a computer readable medium and program code for translating the non-native binary. Additionally, the product includes program code for executing the translated non-native binary, the non-native binary including one or more threads, and program code for pausing execution of the translated non-native binary. The product also includes program code for providing guest instruction boundary information to a monitoring process and program code for analyzing a state of each thread of the translated non-native binary.
    Type: Application
    Filed: April 24, 2009
    Publication date: October 28, 2010
    Applicant: Sun Microsystems, Inc.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Publication number: 20100169308
    Abstract: Techniques for selectively translating resource requests from a program running on a computer system are disclosed. The resource request may be a request to access a file, library file, API, etc. The resource request may be a system call or library call. The computer program may be non-native to the computer system. Translation of resource requests may occur within the operating system or outside it. A resource request containing a reference to a first path and file name may be selectively translated by altering the resource request to contain a reference to a second path and file name. After selectively translating a request, he request is caused to be serviced. A resource request may be serviced by forwarding it to an operating system, and a result may be sent back to the program.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Inventors: Abhinav Das, William Y. Chen, Jiwei Lu, Chandramouli Banerjee
  • Publication number: 20100114555
    Abstract: A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable binary includes a mutex lock encoded instructions for implementing a mutex lock. The guest executable binary is then executed on the host computer architecture by first translating the guest executable binary to a translated executable binary. The encoded instructions for implementing a mutex lock are translated by mapping the mutex lock to an instance of a compound mutex lock data structure. A computer system implementing methods for executing non-native binaries on a host computer architecture is also provided.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 6, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Publication number: 20100115497
    Abstract: A method for executing non-native binaries on a host computer architecture comprises receiving the guest executable binary into a computer readable medium. The guest executable binary is executed on the host computer architecture by translating the guest executable binary into a translated executable binary. Each instruction of the translated executed binary is then executed on the host computer architecture. Signals are responded to by placing signal information on a signal queue and deferring signal handling until a safe point is reached. A computer system implementing the method is also provided.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 6, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Publication number: 20090138859
    Abstract: A method of reproducing runtime environment for debugging an application is disclosed. The method includes reading an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of a plurality of events, the plurality of actions, and a time mark of occurrence for each of the plurality of actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file.
    Type: Application
    Filed: November 27, 2007
    Publication date: May 28, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: William Y. Chen, Jiwei Lu
  • Publication number: 20090089758
    Abstract: A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.
    Type: Application
    Filed: September 30, 2007
    Publication date: April 2, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: William Y. Chen, Jiwei Lu, Geetha K. Vallabhaneni
  • Patent number: 6732356
    Abstract: Systems and methods are provided through which compare instructions in computer code are eliminated partially resolving the predicate of the compare instructions. Partially resolved predicates are used to reduce the number of compares generated during the prediction phase of the compiler. In a partially resolved predicate, the predicate name is defined along the same paths as the fully resolved predicate counterpart, but it can be used to guard a subset of the instructions of the fully resolved predicate name. A partially resolved predicate is generated for predicate names which are only valid in a restricted control flow region. One or more of the control flow edges are ignored when computing control dependence. The predicate name relies partially on the actual ignored control flow edge to prevent incorrect usage of the predicate name.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventor: William Y. Chen
  • Patent number: 6637026
    Abstract: When compiling software for a processor that supports predication, an alerting instruction can be inserted to alert a global register allocator to map particular virtual predicates into the same physical registers. Redundant predicate generating instructions are removed from the resulting program. The alerting instruction can be a predicate copy pseudo-opcode. When the register allocator maps the virtual predicates into the same physical register, the predicate copy pseudo-opcode is removed. When the register allocator does not map the virtual predicates to the same physical register, the predicate copy pseudo-opcode is replaced by an instruction that will perform a predicate copy.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: October 21, 2003
    Assignee: Intel Corporation
    Inventor: William Y. Chen
  • Patent number: 6631465
    Abstract: A method and apparatus that provides instruction re-alignment using a branch on a falsehood of a qualifying predicate. A complementary predicate related to a qualifying predicate is determined to be available. Instructions are re-aligned using a branch on a falsehood of the qualifying predicate if the complementary predicate is not available. Thus, a complementary predicate does not have to be generated to re-align instructions if no complementary predicate is available for the qualifying predicate.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 7, 2003
    Assignee: Intel Corporation
    Inventors: William Y. Chen, Dong-Yuan Chen
  • Patent number: 6505345
    Abstract: An optimization process is disclosed. The process first finds a parallel compare sequence in a program flow, for example using a flow graph. The guarding predicate (gp) is obtained for the compares. If a new dominating predicate (dp) can be found, the process proceeds to determining if compares for the dp generate the correct or needed initial value for the gp. If there are free result slots available, the proper compares are generated and folded into the initialization. If no free slots are available, it is determined if there is a use of a gp between the dp and gp. If not, the dp is renamed to gp, and the proper compares are generated and folded into the initialization. If there is such a use, the guarding predicate of the compares is found and the process reiterates until it ends with the failure to find a new dominating predicate dp.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: January 7, 2003
    Assignee: Intel Corporation
    Inventors: William Y. Chen, Dong-Yuan Chen