Patents by Inventor Willmar Subido

Willmar Subido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047376
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: September 21, 2023
    Publication date: February 8, 2024
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 11810867
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: November 7, 2023
    Assignee: Invensas LLC
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20230059375
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 23, 2023
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 11462483
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: October 4, 2022
    Assignee: Invensas LLC
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20200118939
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10559537
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: February 11, 2020
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10490528
    Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: November 26, 2019
    Assignee: Invensas Corporation
    Inventors: Ashok S. Prabhu, Abiola Awujoola, Wael Zohni, Willmar Subido
  • Publication number: 20190027444
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 24, 2019
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10115678
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: October 30, 2018
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10008469
    Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 26, 2018
    Assignee: Invensas Corporation
    Inventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
  • Publication number: 20180061774
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 1, 2018
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 9812402
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: November 7, 2017
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 9761554
    Abstract: An apparatus, and methods therefor, relates generally to an integrated circuit package. In such an apparatus, a platform substrate has a copper pad. An integrated circuit die is coupled to the platform substrate. A wire bond wire couples a contact of the integrated circuit die and the copper pad. A first end of the wire bond wire is ball bonded with a ball bond for direct contact with an upper surface of the copper pad. A second end of the wire bond wire is stitch bonded with a stitch bond to the contact.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: September 12, 2017
    Assignee: Invensas Corporation
    Inventors: Willmar Subido, Reynaldo Co, Wael Zohni, Ashok S. Prabhu
  • Publication number: 20170117231
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: November 7, 2016
    Publication date: April 27, 2017
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20170103968
    Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
    Type: Application
    Filed: January 12, 2016
    Publication date: April 13, 2017
    Applicant: Invensas Corporation
    Inventors: Ashok S. PRABHU, Abiola AWUJOOLA, Wael ZOHNI, Willmar SUBIDO
  • Publication number: 20170069591
    Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Applicant: Invensas Corporation
    Inventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
  • Patent number: 9530749
    Abstract: An apparatus relates generally to a microelectromechanical system component. In such an apparatus, the microelectromechanical system component has a lower surface, an upper surface, first side surfaces, and second side surfaces. Surface area of the first side surfaces is greater than surface area of the second side surfaces. The microelectromechanical system component has a plurality of wire bond wires attached to and extending away from a first side surface of the first side surfaces. The wire bond wires are self-supporting and cantilevered with respect to the first side surface of the first side surfaces.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: December 27, 2016
    Assignee: Invensas Corporation
    Inventors: Reynaldo Co, Willmar Subido, Hoang Nguyen, Marjorie Cara, Wael Zohni, Christopher W. Lattin
  • Patent number: 9502372
    Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: November 22, 2016
    Assignee: Invensas Corporation
    Inventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
  • Publication number: 20160329294
    Abstract: An apparatus, and methods therefor, relates generally to an integrated circuit package. In such an apparatus, a platform substrate has a copper pad. An integrated circuit die is coupled to the platform substrate. A wire bond wire couples a contact of the integrated circuit die and the copper pad. A first end of the wire bond wire is ball bonded with a ball bond for direct contact with an upper surface of the copper pad. A second end of the wire bond wire is stitch bonded with a stitch bond to the contact.
    Type: Application
    Filed: July 10, 2015
    Publication date: November 10, 2016
    Applicant: Invensas Corporation
    Inventors: Willmar SUBIDO, Reynaldo CO, Wael ZOHNI, Ashok S. PRABHU
  • Patent number: 9490222
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: November 8, 2016
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido