Patents by Inventor Willmar Subido
Willmar Subido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240047376Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: September 21, 2023Publication date: February 8, 2024Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 11810867Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: August 23, 2022Date of Patent: November 7, 2023Assignee: Invensas LLCInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Publication number: 20230059375Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: August 23, 2022Publication date: February 23, 2023Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 11462483Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: December 16, 2019Date of Patent: October 4, 2022Assignee: Invensas LLCInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Publication number: 20200118939Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Applicant: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 10559537Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: September 10, 2018Date of Patent: February 11, 2020Assignee: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 10490528Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.Type: GrantFiled: January 12, 2016Date of Patent: November 26, 2019Assignee: Invensas CorporationInventors: Ashok S. Prabhu, Abiola Awujoola, Wael Zohni, Willmar Subido
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Publication number: 20190027444Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: September 10, 2018Publication date: January 24, 2019Applicant: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 10115678Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: November 6, 2017Date of Patent: October 30, 2018Assignee: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 10008469Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.Type: GrantFiled: November 21, 2016Date of Patent: June 26, 2018Assignee: Invensas CorporationInventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
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Publication number: 20180061774Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: November 6, 2017Publication date: March 1, 2018Applicant: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 9812402Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: November 7, 2016Date of Patent: November 7, 2017Assignee: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Patent number: 9761554Abstract: An apparatus, and methods therefor, relates generally to an integrated circuit package. In such an apparatus, a platform substrate has a copper pad. An integrated circuit die is coupled to the platform substrate. A wire bond wire couples a contact of the integrated circuit die and the copper pad. A first end of the wire bond wire is ball bonded with a ball bond for direct contact with an upper surface of the copper pad. A second end of the wire bond wire is stitch bonded with a stitch bond to the contact.Type: GrantFiled: July 10, 2015Date of Patent: September 12, 2017Assignee: Invensas CorporationInventors: Willmar Subido, Reynaldo Co, Wael Zohni, Ashok S. Prabhu
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Publication number: 20170117231Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: ApplicationFiled: November 7, 2016Publication date: April 27, 2017Applicant: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
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Publication number: 20170103968Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.Type: ApplicationFiled: January 12, 2016Publication date: April 13, 2017Applicant: Invensas CorporationInventors: Ashok S. PRABHU, Abiola AWUJOOLA, Wael ZOHNI, Willmar SUBIDO
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Publication number: 20170069591Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.Type: ApplicationFiled: November 21, 2016Publication date: March 9, 2017Applicant: Invensas CorporationInventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
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Patent number: 9530749Abstract: An apparatus relates generally to a microelectromechanical system component. In such an apparatus, the microelectromechanical system component has a lower surface, an upper surface, first side surfaces, and second side surfaces. Surface area of the first side surfaces is greater than surface area of the second side surfaces. The microelectromechanical system component has a plurality of wire bond wires attached to and extending away from a first side surface of the first side surfaces. The wire bond wires are self-supporting and cantilevered with respect to the first side surface of the first side surfaces.Type: GrantFiled: April 28, 2015Date of Patent: December 27, 2016Assignee: Invensas CorporationInventors: Reynaldo Co, Willmar Subido, Hoang Nguyen, Marjorie Cara, Wael Zohni, Christopher W. Lattin
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Patent number: 9502372Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.Type: GrantFiled: April 30, 2015Date of Patent: November 22, 2016Assignee: Invensas CorporationInventors: Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Xuan Li, Long Huynh, Gabriel Z. Guevara, Akash Agrawal, Willmar Subido, Laura Wills Mirkarimi
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Publication number: 20160329294Abstract: An apparatus, and methods therefor, relates generally to an integrated circuit package. In such an apparatus, a platform substrate has a copper pad. An integrated circuit die is coupled to the platform substrate. A wire bond wire couples a contact of the integrated circuit die and the copper pad. A first end of the wire bond wire is ball bonded with a ball bond for direct contact with an upper surface of the copper pad. A second end of the wire bond wire is stitch bonded with a stitch bond to the contact.Type: ApplicationFiled: July 10, 2015Publication date: November 10, 2016Applicant: Invensas CorporationInventors: Willmar SUBIDO, Reynaldo CO, Wael ZOHNI, Ashok S. PRABHU
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Patent number: 9490222Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.Type: GrantFiled: October 12, 2015Date of Patent: November 8, 2016Assignee: Invensas CorporationInventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido