Patents by Inventor Wim Dehaene

Wim Dehaene has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240293391
    Abstract: The invention relates to isoquinoline and pyridine based CXCR4 antagonists and their use in the treatment and prevention of viral infections such as HIV.
    Type: Application
    Filed: June 24, 2022
    Publication date: September 5, 2024
    Inventors: Wim DEHAEN, Steven DE JONGHE, Dominique SCHOLS, Tom VAN LOY
  • Patent number: 11971740
    Abstract: An integrated circuit and method of designing an integrated circuit including an error detection and correction circuit is described. The integrated circuit includes a data-path being arranged between an output of a first register and second register clocked by a system clock. The integrated circuit includes a timing error detection and correction circuit (EDAC) which has a clock unit configured to receive a reference clock and to provide a delayed reference clock. The EDAC includes a plurality of transition detectors coupled to a respective node on the data-path and an error detection circuit coupled to each transition detector. The error detection circuit flags an error if a transition occurs during a time period between a transition of the reference clock and a corresponding transition of the delayed reference clock. A timing correction circuit coupled to the error detection circuit outputs the system clock derived from the delayed reference clock.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: April 30, 2024
    Assignee: NXP B.V.
    Inventors: Roel Lieve P Uytterhoeven, Wim Dehaene
  • Patent number: 11799563
    Abstract: A method of generating ultrasound by driving an array of ultrasonic transducers comprises a charge transfer procedure. The charge transfer procedure comprises switching a terminal of a first ultrasonic transducer of the array, at a first electric potential, to a charge distribution bus; switching a terminal of a second ultrasonic transducer of the array, at a second electric potential different than the first potential, to the charge distribution bus; and allowing charge to flow between the first ultrasonic transducer and the second ultrasonic transducer through the charge distribution bus.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: October 24, 2023
    Assignees: Imec vzw, Katholieke Universiteit Leuven
    Inventors: Jonas Pelgrims, Kris Myny, Wim Dehaene
  • Patent number: 11645503
    Abstract: A circuit is provided. The circuit includes a sampling circuit connectable to a multibit memory array and that samples a voltage across a sampling capacitor, a capacitance network including a plurality of capacitors and switching elements such that the capacitance network has a capacitance that depends on the configuration of the switching elements, and a buffering circuit configured to charge the capacitance of the capacitance network based on the voltage across the sampling capacitor. The circuit is configured to operate the capacitance network in a first state and a second state, wherein the capacitance in the states depends on an input value to the circuit. The circuit is also configured to charge the capacitance network in the first state and to allow the charge to redistribute within the capacitance network when it changes from the first to the second state. A system and method including such circuits are also provided.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: May 9, 2023
    Assignees: Imec vzw, Katholieke Universiteit Leuven
    Inventors: Mohit Gupta, Bharani Chakravarthy Chava, Wim Dehaene, Sushil Sakhare
  • Publication number: 20220349749
    Abstract: A charge sensor element includes a charge collecting detector configured to generate an intensity signal indicative of an amount of charge at an internal charge sensor element node, an amplifier transistor that is electrically connected to the internal charge sensor element node and configured to amplify the intensity signal, and a reset transistor that is electrically connected to the internal charge sensor element node and configured to reset the intensity signal. The amplifier transistor or the reset transistor includes a front gate and a back gate that are configured to control the amplifier transistor or the reset transistor.
    Type: Application
    Filed: April 19, 2022
    Publication date: November 3, 2022
    Inventors: Aris Siskos, Florian De Roose, Kris Myny, Wim Dehaene
  • Publication number: 20220201821
    Abstract: A pixel circuit for driving a light-emitting diode (LED) comprises a current-mirror, comprising a primary current path and a secondary current path, arranged to mirror a current through the primary current path to the secondary current path. The current through the primary current path is settable by switching a reference current into the primary current path through a reference current line. The secondary current path is configured to drive the LED. The pixel circuit also includes a switch component arranged to switch the LED to and from the secondary current path based on one or more switch control lines.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 23, 2022
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene, Wim Van Eessen, Patrick Willem
  • Publication number: 20220199002
    Abstract: A compensated current mirror circuit comprises a current mirror with a primary current path and a secondary current path, configured to mirror a current through the primary current path to the secondary current path. The current is settable by switching a reference current through a reference current line into the primary current path. A primary current mirror transistor is connected in series with the primary current path. A secondary current mirror transistor is connected in series with the secondary current path. A gate of the primary current mirror transistor is connected to a gate of the secondary current mirror transistor at a current mirror node. A compensation block is connected to a back gate of the secondary current mirror transistor and to one or more compensation control lines, and is configured to apply a compensation signal at the back gate based on the compensation control lines.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Publication number: 20210382518
    Abstract: An integrated circuit and method of designing an integrated circuit including an error detection and correction circuit is described. The integrated circuit includes a data-path being arranged between an output of a first register and second register clocked by a system clock. The integrated circuit includes a timing error detection and correction circuit (EDAC) which has a clock unit configured to receive a reference clock and to provide a delayed reference clock. The EDAC includes a plurality of transition detectors coupled to a respective node on the data-path and an error detection circuit coupled to each transition detector. The error detection circuit flags an error if a transition occurs during a time period between a transition of the reference clock and a corresponding transition of the delayed reference clock. A timing correction circuit coupled to the error detection circuit outputs the system clock derived from the delayed reference clock.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 9, 2021
    Inventors: Roel Lieve P Uytterhoeven, Wim Dehaene
  • Publication number: 20210306079
    Abstract: A method of generating ultrasound by driving an array of ultrasonic transducers comprises a charge transfer procedure. The charge transfer procedure comprises switching a terminal of a first ultrasonic transducer of the array, at a first electric potential, to a charge distribution bus; switching a terminal of a second ultrasonic transducer of the array, at a second electric potential different than the first potential, to the charge distribution bus; and allowing charge to flow between the first ultrasonic transducer and the second ultrasonic transducer through the charge distribution bus.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 30, 2021
    Inventors: Jonas Pelgrims, Kris Myny, Wim Dehaene
  • Patent number: 10978000
    Abstract: A method for driving an active matrix display comprising a plurality of pixels, wherein each pixel comprises a drive transistor having a driver gate, is disclosed. The method comprises: receiving information of a desired image to be displayed; determining a compensated voltage for the driver gate for each pixel based on calibration data, wherein the calibration data comprises a set of individual calibration values applying to different pixels, and wherein the compensated voltage compensates for differences between pixels affecting a relation of an intensity of light output by the pixel as function of a difference between the voltage applied to the driver gate and a threshold voltage of the drive transistor; and outputting the compensated voltage for the driver gate for each of the pixels.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: April 13, 2021
    Assignee: IMEC vzw
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Publication number: 20200210822
    Abstract: A circuit is provided. The circuit includes a sampling circuit connectable to a multibit memory array and that samples a voltage across a sampling capacitor, a capacitance network including a plurality of capacitors and switching elements such that the capacitance network has a capacitance that depends on the configuration of the switching elements, and a buffering circuit configured to charge the capacitance of the capacitance network based on the voltage across the sampling capacitor. The circuit is configured to operate the capacitance network in a first state and a second state, wherein the capacitance in the states depends on an input value to the circuit. The circuit is also configured to charge the capacitance network in the first state and to allow the charge to redistribute within the capacitance network when it changes from the first to the second state. A system and method including such circuits are also provided.
    Type: Application
    Filed: December 20, 2019
    Publication date: July 2, 2020
    Inventors: Mohit Gupta, Bharani Chakravarthy Chava, Wim Dehaene, Sushil Sakhare
  • Publication number: 20190355308
    Abstract: A method for driving an active matrix display comprising a plurality of pixels, wherein each pixel comprises a drive transistor having a driver gate, is disclosed. The method comprises: receiving information of a desired image to be displayed; determining a compensated voltage for the driver gate for each pixel based on calibration data, wherein the calibration data comprises a set of individual calibration values applying to different pixels, and wherein the compensated voltage compensates for differences between pixels affecting a relation of an intensity of light output by the pixel as function of a difference between the voltage applied to the driver gate and a threshold voltage of the drive transistor; and outputting the compensated voltage for the driver gate for each of the pixels.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 21, 2019
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Patent number: 10429322
    Abstract: The present invention relates to a millimeter or terahertz wave sensor for providing inline inspection, preferably including but not limited to continuous monitoring of objects, for example thin sheet dielectric material.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: October 1, 2019
    Assignee: HAMMER-IMS
    Inventors: Noël Deferm, Tom Redant, Wim Dehaene, Patrick Reynaert
  • Publication number: 20190205095
    Abstract: A semiconductor cell comprising a memory element for storing a first binary operand is disclosed. In one aspect, the memory element provides complementary memory outputs, and a multiplication block that is locally and uniquely associated with the memory element. The multiplication block may be configured to receive complementary input signals representing binary input data and the complementary memory outputs of the associated memory element representing the first binary operand, implement a multiplication operation on these signals, and provide an output of the multiplication operation to an output port. An array of semiconductor cells and a neural network circuit comprising such array are also disclosed.
    Type: Application
    Filed: December 17, 2018
    Publication date: July 4, 2019
    Inventors: Mohit Gupta, Wim Dehaene, Sushil Sakhare, Pieter Weckx
  • Patent number: 10167302
    Abstract: The present invention relates to a compound of formula (I), or a pharmaceutically acceptable salt or prodrug thereof, and their use in medicine particular as anti-viral agents; wherein: X is selected from O and NR11; Y is selected from O, S and NR12; A is selected from —(CR1R2)n-, —(CR9R10)—, —(CR9R10)—(CR1R2)n-, —(CR1R3)—(CR2R4)—(CR1R2)n-, —CR3?CR4—(CR1R2)n- and —C?C—(CR1R2)n-; R1 and R2 are independently selected from H, alkyl, hydroxyl, hydroxymethyl and halogen; R3 and R4 are independently selected from H and alkyl, or R3 and R4 together with the carbon atoms to which they are attached form a mono or bicyclic ring system selected from cycloalkyl, cycloalkenyl, heterocycloalkyl, heterocycloalkenyl, aryl and heteroaryl; R5 is selected from H, P(?O)(OH)2 and P(?O)(OH)—O—P(?O)(OH)2; R6 is selected from H and alkyl; R7 and R8 are independently selected from H, alkyl, halogen and hydroxymethyl R9 and R19 together with the carbon atoms to which they are attached form a mono or bicyclic ring system selected
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: January 1, 2019
    Assignees: UNIVERSITY COLLEGE CORK, KATHOLIEKE UNIVERSITEIT LEUVEN
    Inventors: Anita Maguire, Alan Ford, Jan Balzarini, Wim Dehaen
  • Patent number: 9822137
    Abstract: A first aspect of the invention relates to a compound of formula (I), or a pharmaceutically acceptable salt or prodrug thereof, wherein the groups are as defined in the claims. Further aspects of the invention relate to pharmaceutical compositions comprising compounds of formula (I), and the use of compounds of formula (I) in the preparation of a medicament for treating a viral disorder.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: November 21, 2017
    Assignees: UNIVERSITY COLLEGE CORK, KATHOLIEKE UNIVERSITEIT LEUVEN
    Inventors: Wim Dehaen, Jan Balzarini, Anita Maguire, Sarah Jane Keane, Alan Ford, Nuala Maguire, Nicholas D. Mullins
  • Publication number: 20170218001
    Abstract: The present invention relates to a compound of formula (I), or a pharmaceutically acceptable salt or prodrug thereof, and their use in medicine particular as anti-viral agents; wherein: X is selected from O and NR11; Y is selected from O, S and NR12; A is selected from —(CR1R2)n-, —(CR9R10)—, —(CR9R10)—(CR1R2)n-, —(CR1R3)—(CR2R4)—(CR1R2)n-, —CR3?CR4—(CR1R2)n- and —C?C—(CR1R2)n-; R1 and R2 are independently selected from H, alkyl, hydroxyl, hydroxymethyl and halogen; R3 and R4 are independently selected from H and alkyl, or R3 and R4 together with the carbon atoms to which they are attached form a mono or bicyclic ring system selected from cycloalkyl, cycloalkenyl, heterocycloalkyl, heterocycloalkenyl, aryl and heteroaryl; R5 is selected from H, P(?O)(OH)2 and P(?O)(OH)—O—P(?O)(OH)2; R6 is selected from H and alkyl; R7 and R8 are independently selected from H, alkyl, halogen and hydroxymethyl R9 and R19 together with the carbon atoms to which they are attached form a mono or bicyclic ring system selected
    Type: Application
    Filed: May 22, 2015
    Publication date: August 3, 2017
    Inventors: Anita MAGUIRE, Alan Ford, Jan BALZARINI, Wim DEHAEN
  • Patent number: 9278958
    Abstract: The present invention relates to compounds having cytostatic activity against tumor cells. The compounds of the invention are of formula (I), or derivatives hereof, wherein R0, R1, R2, A, and X have defined meanings as described in claim 1.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: March 8, 2016
    Assignees: Katholieke Universiteit Leuven K.U. Leuven R&D, Universita Degli Studi Di Ferrara
    Inventors: Jan Balzarini, Wim Dehaen, Joice Thomas, Sandra Liekens, Romeo Romagnoli, Pier Giovanni Baraldi
  • Publication number: 20150291640
    Abstract: A first aspect of the invention relates to a compound of formula (I), or a pharmaceutically acceptable salt or prodrug thereof, wherein the groups are as defined in the claims. Further aspects of the invention relate to pharmaceutical compositions comprising compounds of formula (I), and the use of compounds of formula (I) in the preparation of a medicament for treating a viral disorder.
    Type: Application
    Filed: November 20, 2013
    Publication date: October 15, 2015
    Inventors: Wim Dehaen, Jan Balzarini, Anita Maguire, Sarah Jane Keane, Alan Ford, Nuala Maguire, Nicholas D. Mullins
  • Publication number: 20150126559
    Abstract: The present invention relates to compounds having cytostatic activity against tumor cells. The compounds of the invention are of formula (I), or derivatives hereof, wherein R0, R1, R2, A, and X have defined meanings as described in claim 1.
    Type: Application
    Filed: June 21, 2013
    Publication date: May 7, 2015
    Applicant: UNIVERSITA DEGLI STUDI DI FERRARA
    Inventors: Jan Balzarini, Wim Dehaen, Joice Thomas, Sandra Liekens, Romeo Romagnoli, Pier Giovanni Baraldi