Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.

Abstract: Aspects of the disclosure provide for a circuit including a squelch detector having a first input coupled to a first node and configured to receive a positive component of a differential signal with a floating center tap, a second input coupled to a second node and configured to receive a negative component of the differential signal, and an output coupled to a logic circuit, a first resistor coupled between the first node and a third node, a second resistor coupled between the third node and the second node, a third resistor coupled between the first node and a fourth node, a fourth resistor coupled between the fourth node and the second node, a capacitor coupled between the fourth node and a ground terminal, a comparator having a first input coupled to the third node, a second input coupled to a fifth node, and an output coupled to the logic circuit.

Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.

Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving, at a circuit, data via a differential input signal, detecting a rising edge in the data received via the differential input signal, and precharging a common mode voltage (Vcm) node of the differential input signal responsive to detecting the rising edge in the data received via the differential input signal, wherein the Vcm node is a floating node.

Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.

Abstract: Disclosed is a device for cell culture, the device includes a first chamber having an area for containing cells, such as isolated cells, for growth; a second chamber for containing culture medium; a semi permeable membrane forming at least part of a divider between the first chamber and the second chamber; wherein the area for containing cells for growth is adjustable via a moveable wall disposed within the first chamber. The device is especially suited for culturing of semi-adherent and non-adherent cells.

Abstract: A method for maintaining packet's source network identification information while aggregating packets from a plurality of networks is provided. An ingress packet is processed to extract a plurality of packet header fields and port identifier. A first hash index is generated by hashing information associated with the plurality of packet header fields. The extracted port identifier is stored in a hash table using the generated first hash index. The ingress packet is forwarded to one or more inline tool devices. An egress packet received from the one or more inline tools is processed to extract the plurality of packet header fields. A second hash index is generated by hashing information associated with the plurality of packet header fields. The port identifier is retrieved from the hash table based on the generated second hash index. The egress packet is transmitted to a switching device based on the retrieved port identifier.

Abstract: A method for determining a routing for packets aggregated from multiple Layer 2 (L2) networks is provided. An ingress packet is received from an ingress inline network port and is processed to extract a source Media Access Control (MAC) address and a port identifier associated with the source MAC address. The extracted source MAC address of the ingress packet is looked up in a MAC address table. The ingress packet is forwarded to an inline tool device. When an egress packet is received back from the inline tool device it is processed to extract source and destination MAC addresses. The extracted source and destination MAC addresses of the egress packet are looked up in the MAC address table. The egress packet is transmitted to an egress inline port based on the looked up destination MAC address.

Abstract: A Universal Serial Bus (USB) adapter includes a USB hub and a USB switch. The USB hub includes a plurality of downstream ports and one upstream port. The USB switch includes a plurality of connections that comprise a first connection configured to be coupled to a first USB apparatus, a second connection configured to be coupled to a second USB apparatus, a third connection coupled to the USB hub's upstream port, and a fourth connection coupled to one of the USB hub's downstream ports. The USB switch is configured to establish a first communication path between the first and second connections that bypasses the USB hub based on a determination that the first USB apparatus is to operate as a USB host, and to establish a second communication path through the USB hub based on a determination that the first USB apparatus is to operate as a client device.

Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.

Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.

Abstract: A method for determining a routing for packets aggregated from multiple Layer 2 (L2) networks is provided. An ingress packet is received from an ingress inline network port and is processed to extract a source Media Access Control (MAC) address and a port identifier associated with the source MAC address. The extracted source MAC address of the ingress packet is looked up in a MAC address table. The ingress packet is forwarded to an inline tool device. When an egress packet is received back from the inline tool device it is processed to extract source and destination MAC addresses. The extracted source and destination MAC addresses of the egress packet are looked up in the MAC address table. The egress packet is transmitted to an egress inline port based on the looked up destination MAC address.

Abstract: A method for maintaining packet's source network identification information while aggregating packets from a plurality of networks is provided. An ingress packet is processed to extract a plurality of packet header fields and port identifier. A first hash index is generated by hashing information associated with the plurality of packet header fields. The extracted port identifier is stored in a hash table using the generated first hash index. The ingress packet is forwarded to one or more inline tool devices. An egress packet received from the one or more inline tools is processed to extract the plurality of packet header fields. A second hash index is generated by hashing information associated with the plurality of packet header fields. The port identifier is retrieved from the hash table based on the generated second hash index. The egress packet is transmitted to a switching device based on the retrieved port identifier.

Abstract: An apparatus and method for configuring a serial communication hub are disclosed herein. A serial communication hub includes an upstream port, a plurality of downstream ports, and a port controller. The port controller is configured to: arrange each of a first of the downstream ports and a second of the downstream ports to individually operate as a first type of serial communication interface; and to arrange the first of the downstream ports and the second of the downstream ports to operate in combination as a second type of serial communication interface.

Abstract: An apparatus includes a multiport hub, a single bridge configured to communicatively couple together a plurality of hosts and to emulate a slave device to each such host, and a plurality of connection port. The apparatus further includes a configurable data path network coupled to the multiport hub, the single bridge, and the plurality of connection ports. The configurable data path network is configured to selectively provide for a connection port for which a host is detected, data communications through the single bridge between the multiport hub and the connection port, and for a connection port for which no host is detected, data communications between the multiport hub and the connection port that bypass the single bridge. Corresponding methods are also so disclosed.

Abstract: A Universal Serial Bus (USB) adapter includes a USB hub and a USB switch. The USB hub includes a plurality of downstream ports and one upstream port. The USB switch includes a plurality of connections that comprise a first connection configured to be coupled to a first USB apparatus, a second connection configured to be coupled to a second USB apparatus, a third connection coupled to the USB hub's upstream port, and a fourth connection coupled to one of the USB hub's downstream ports. The USB switch is configured to establish a first communication path between the first and second connections that bypasses the USB hub based on a determination that the first USB apparatus is to operate as a USB host, and to establish a second communication path through the USB hub based on a determination that the first USB apparatus is to operate as a client device.

Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.

Abstract: Disclosed are compounds Formula I and pharmaceutically acceptable salts thereof, wherein R1, R2, R3/R4, and R5 are defined herein. These compounds are useful for treating diseases and conditions caused or exacerbated by unregulated p38 MAP Kinase and/or TNF activity. Pharmaceutical compositions containing the compounds, methods of preparing the compounds and methods of treatment using the compounds are also disclosed.

Abstract: Disclosed are compounds Formula I and pharmaceutically acceptable salts thereof, wherein R1, R2, R3, R4, and R5 are defined herein. These compounds are useful for treating diseases and conditions caused or exacerbated by unregulated p38 MAP Kinase and/or TNF activity. Pharmaceutical compositions containing the compounds, methods of preparing the compounds and methods of treatment using the compounds are also disclosed.