Patents by Inventor Winston Ki-Cheong Mok
Winston Ki-Cheong Mok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10104047Abstract: The present disclosure relates to a system and method of encrypting and decrypting Optical Transport Network (OTN) payload content. A transmitter of the system includes a series of ordered encryption keys and a counter for generating an initialization vector to be combined with one of the encryption keys for encrypting the OTN payload content. A receiver of the system includes a series of ordered decryption keys and a counter for generating an initialization vector to be combined with one of the decryption keys for decrypting the encrypted OTN payload content. The system synchronizes switching, at the transmitter and the receiver, the encryption and decryption keys to the next keys in each series. The system also synchronizes the counters for generating the same initialization vector at the transmitter and the receiver.Type: GrantFiled: April 8, 2016Date of Patent: October 16, 2018Assignee: Microsemi Solutions (U.S.), Inc.Inventors: Scott Arthur Muma, Victor Gusev Lesau, Winston Ki-Cheong Mok, Somu Karuppan Chetty
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Patent number: 9473261Abstract: A method of enabling transport of symmetric latency-sensitive constant-bit-rate (CBR) client data streams over an optical transport network (OTN) is provided. The method performs, utilizing an OTN wrapping device, an OTN wrapping operation on a received first constant-bit-rate (CBR) client data stream to form a first framed OTN data stream. The method determines a static wrapping delay induced on the first CBR client data stream by the OTN wrapping operation, performs, utilizing the OTN wrapping device, an OTN unwrapping operation on a received second framed OTN data stream to extract a second CBR client data stream from the second framed OTN data stream, determines a static unwrapping delay induced on the second framed OTN data stream by the OTN unwrapping operation, and equalizes the static wrapping and unwrapping delays by adjusting, at the OTN wrapping device, at least one of the static wrapping and unwrapping delays.Type: GrantFiled: May 21, 2014Date of Patent: October 18, 2016Assignee: Microsemi Storage Solutions (U.S.), Inc.Inventors: Richard Tsz Shiu Tse, Calvin Francis Hass, Winston Ki-Cheong Mok
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Publication number: 20160301669Abstract: The present disclosure relates to a system and method of encrypting and decrypting Optical Transport Network (OTN) payload content. A transmitter of the system includes a series of ordered encryption keys and a counter for generating an initialization vector to be combined with one of the encryption keys for encrypting the OTN payload content. A receiver of the system includes a series of ordered decryption keys and a counter for generating an initialization vector to be combined with one of the decryption keys for decrypting the encrypted OTN payload content. The system synchronizes switching, at the transmitter and the receiver, the encryption and decryption keys to the next keys in each series. The system also synchronizes the counters for generating the same initialization vector at the transmitter and the receiver.Type: ApplicationFiled: April 8, 2016Publication date: October 13, 2016Inventors: Scott Arthur MUMA, Victor Gusev LESAU, Winston Ki-Cheong MOK, Somu Karuppan CHETTY
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Patent number: 9374265Abstract: A GFP frame filter is provided to filter GFP frame data based on extracted GFP header data. The header data comprises EXI, PTI, and UPI fields. The header data can also comprise a generic header that can be customized to provide additional GFP frame filtering applications. The GFP frame filter comprises a plurality of programmable filters arranged to process GFP header data in parallel according to various programmable filter configurations. The plurality of programmable filters can be configured to operate in conjunction in a particular sequence.Type: GrantFiled: March 15, 2013Date of Patent: June 21, 2016Assignee: Microsemi Storage Solutions (U.S.), Inc.Inventors: Winston Ki-Cheong Mok, Jayeshkumar Roonwal, Kishor Ashanand Ruparel
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Patent number: 9313563Abstract: Provided is a method and system for switching between signals in an optical transport network. The method includes extracting identification data from an OTN signal at a termination sink and inserting the identification data into an Ethernet packet. The system includes a termination sink configured to extract identification data from an OTN signal and insert the identification data into an Ethernet packet.Type: GrantFiled: March 14, 2013Date of Patent: April 12, 2016Assignee: PMC-SIERRA US, INC.Inventors: Winston Ki-Cheong Mok, Somu Karuppan Chetty
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Patent number: 9288006Abstract: A method and apparatus are provided for de-multiplexing one or more Low-Order ODUj/ODUflex clients from a High-Order ODUk carrier. The number of TribSlots assigned to an ODUflex may be increased and decreased hitlessly, in accordance to ITU-T G.7044. In the Multiplexing direction, a Space-Time-Space switch is used to interleave bytes from Low-Order ODUk words into High-Order ODUk words. In the De-multiplexing direction, a similar switch is used to extract Low-Order ODUj bytes that are interleaved inside High-Order ODUk words and re-arrange them into Low-Order ODUj words.Type: GrantFiled: March 15, 2013Date of Patent: March 15, 2016Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Somu Karuppan Chetty, Jonathan Avey
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Patent number: 9276874Abstract: A system and method of delineating GFP data. The GFP framer comprises a candidate generator for generating an array of core header candidates from a data word received on a data bus, a candidate processor for generating a plurality of candidate tours and a frame delineator for identifying a candidate tour as an active tour and delineating the boundaries of the GFP frames defined by the active tour. Each core header candidate defines a reference position of one of the plurality of candidate tours. Each of the plurality of candidate tour comprises a record of core header positions for a series of GFP frames from the data word.Type: GrantFiled: March 15, 2013Date of Patent: March 1, 2016Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Jayeshkumar Roonwal, Kishor Ashanand Ruparel
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Patent number: 9025594Abstract: A method and apparatus are provided for multiplexing one or more Low-Order (LO) ODUj/ODUflex clients into a High-Order (HO) ODUk in an Optical Transport Network (OTN). LO bytes are multiplexed in accordance with a tributary slot assignment for a selected LO ODUj of the HO ODUk stream using a permutation matrix. In an implementation, each byte on each ingress port of a W-port space-time-space switch is configurably assigned to an associated timeslot of an associated egress port, using time-division multiplexing. The number of TribSlots assigned to an ODUflex may be increased and decreased hitlessly. A Clos-like Space-Time-Space switch is used to interleave bytes from Low-Order ODUk words into High-Order ODUk words.Type: GrantFiled: March 15, 2013Date of Patent: May 5, 2015Assignee: PMC-Sierra US Inc.Inventors: Winston Ki-Cheong Mok, Somu Karuppan Chetty, Jonathan Avey
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Patent number: 9019997Abstract: This disclosure describes a method and apparatus for signaling the phase and frequency of OTN and Constant Bit Rate (CBR) clients in an OTN network. The principles discussed are applicable when multiple stages of OTN multiplexing and demultiplexing are utilized. They are also applicable for use with the Generic Mapping Procedure (GMP) and Asynchronous Mapping Procedure (AMP). A method to use the phase and frequency of an ODUk/ODUflex to adjust a local reference clock to enable the recovery of the phase and frequency of a CBR client demapped from the ODUk/ODUflex is described.Type: GrantFiled: March 15, 2013Date of Patent: April 28, 2015Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Karl Scheffer, Michael Smith
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Patent number: 8989222Abstract: A method and apparatus are provided for generating Generic Mapping Procedure (GMP) stuff/data decisions, which avoids brute force modulo arithmetic and is efficient for hitless adjustment of ODUFIex (G.7044) in an Optical Transport Network (OTN). Addition operations are used, rather than multiplication operations, to facilitate faster and less computationally expensive calculation of data/stuff decisions, based on calculated residue values. Residue values are logically arranged in rows to facilitate residue calculation, such as based on relationships with previously calculated residue values. This method is also applicable for mapping and de-mapping Constant Bit Rate (CBR) clients into and from an ODUk carrier.Type: GrantFiled: March 15, 2013Date of Patent: March 24, 2015Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Somu Karuppan Chetty, Jonathan Avey, Steven Scott Gorshe
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Patent number: 8976816Abstract: A self-synchronous scrambler/descrambler and method for operating same are disclosed. A self-synchronous scrambler/descrambler comprises an M-bit Scrambler State memory for retaining M previously scrambled/descrambled bits, a SOP/EOP Zero Inserter for receiving replacing certain bytes of the bus word with a value of zero, a Mid-Packet Word Logic for scrambling/descrambling the received bits using the previously scrambled/descrambled bits from the M-bit Scrambler State memory; and a Barrel Shifter for rotating the M-bit Scrambler State memory backwards. The method for scrambling/descrambling bits, comprising receiving a bus word, replacing certain bytes of the bus word, scrambling/descrambling bits of the bus word by exclusive-ORing with previously scrambled/descrambled bits, retaining the scrambled/descrambled bits of the bus word; and rotating the scrambled/descrambled bits of the bus word backwards an amount.Type: GrantFiled: March 15, 2013Date of Patent: March 10, 2015Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Richard Arthur John Steedman
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Patent number: 8854963Abstract: Methods and systems are provided for controlling elements in a signal path of a communication network to accommodate changes in the rate of a client signal. In particular, during the bandwidth resizing (BWR) portion of ITU-T Recommendation G.7044 Hitless Adjustment of ODUflex(GFP) protocol (HAO), the nodes in the chain along the ODUflex(GFP) signal path change their output rates in parallel such that FIFO over/underflow is avoided in the nodes. Certain embodiments provide mechanisms to synchronize and stabilize the nodes in a verifiable manner.Type: GrantFiled: May 8, 2012Date of Patent: October 7, 2014Assignee: PMC-Sierra US, Inc.Inventors: Scott Muma, Winston Ki-Cheong Mok, Steven Scott Gorshe, Karl Scheffer
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Patent number: 8542708Abstract: A method and apparatus are described for signaling the phase and frequency of constant bit rate (CBR) clients over a network or fabric. An incoming CBR client stream is segmented into variable sized segments, such as packets or general framing protocol (GFP) frames, and is regenerated on the other side of a fabric or network phase-locked to the incoming stream. Regeneration of the CBR client clock is based solely on segment sizes, and in the case of GFP frames, the rate of the SONET Path or OTN ODUk stream carrying the GFP frames. No overhead bytes are inserted into the GFP frames to convey phase and frequency information. The method disclosed is important for reducing the cost and complexity of communications networks by allowing CBR clients to be transported with low jitter and wander without requiring the source and sink network elements to be phase-locked to a common stratum reference.Type: GrantFiled: June 7, 2010Date of Patent: September 24, 2013Assignee: PMC-Sierra US, Inc.Inventors: Winston Ki-Cheong Mok, Karl Scheffer
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Patent number: 8428203Abstract: Large interfering signals (interferers) with spectra near a desired signal can cause distortion in a wireless receiver due to a non-linear signal path. It is typically a performance advantage to attenuate these interferers earlier in the signal path, rather than later in the signal path, because these interferers can cause saturation of amplifying stages. In certain situations, the frequency offset of an interfering signal, with respect to the desired signal, can be on the order of 10 megahertz (MHz), whereas the center frequencies can be on the order of several gigahertz (GHz). Thus, a filter with “baseband” precision would be needed at radio frequency to notch out the interferer, which is relatively difficult to do. Disclosed is a technique to estimate the relative strength and center frequency of the interferer and to place the center frequency of a notch filter adaptively and precisely at the interferer location.Type: GrantFiled: January 6, 2009Date of Patent: April 23, 2013Assignee: PMC-Sierra, Inc.Inventors: Anthony Eugene Zortea, Mathew McAdam, Mathieu Gagnon, Graeme Boyd, Winston Ki-Cheong Mok
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Patent number: 8413006Abstract: A method and system are provided to detect and correct errors in the Interlaken block code overhead bits. Specifically, a method is provided for determining the original transmitted information with a very high probability of correct interpretation. These approaches can also characterized by their minimal complexity. Further, such a method can operate on the received information in a manner that does not require consideration of special cases. Also, the method does not require the source to send any extra information or alter its current behavior in any way. Thus, the approaches described herein are compatible with all existing Interlaken sources and can provide immediate benefits.Type: GrantFiled: February 12, 2010Date of Patent: April 2, 2013Assignees: PMC-Sierra, Inc., Open-Silicon, Inc.Inventors: Winston Ki-Cheong Mok, Steven Scott Gorshe, Matthew David Weber
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Patent number: 8085764Abstract: A method and an apparatus for reducing power consumption and digital logic noise in a time division multiplexed memory switch. The method is embodied in an egress selection switch (ESS) block architecture. The ESS block includes a data disable block which prevents the propagation of data, in particular ingress grains, to a given group of egress ports if the data is not selected by any of the egress ports in a given group. While the ingress data disable method partitions ports into groups and saves power by disabling the fanout tree from the root on a port group basis, the egress data disable method saves power on a port group basis by disabling the fanout tree from the tail end in addition to applying the ingress data disable method. The ESS block also includes an grain select block for selecting and storing a given ingress grain for eventual output to an egress port.Type: GrantFiled: July 17, 2008Date of Patent: December 27, 2011Assignee: PMC-Sierra US, Inc.Inventors: Carl Dietz McCrosky, Andrew Milton Hughes, Winston Ki-Cheong Mok, Nicholas Wayne Rolheiser
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Patent number: 7668210Abstract: A method and apparatus are provided for reducing current demand variations in large fanout trees. The fanout tree is split into at least 2 sub-groups, each preferably with substantially equal parasitic capacitance. Data is then scrambled according to a scrambling sequence function to provide scrambled data having a constant number of bits that are toggled with respect to time, such as when observed in pairs of sub-groups. Functionally, an apparatus according to an embodiment of the present invention includes 3 blocks: a scrambler, egress logic, and a de-scrambler. The egress logic is simply a block of storage that can reorder the bytes received from the scrambler. The de-scrambler de-scrambles the retransmitted data based on the scrambling sequence function. Embodiments of the present invention can be applied to any system where data must fanout from a single source to many destinations, such as switches.Type: GrantFiled: April 23, 2004Date of Patent: February 23, 2010Assignee: PMC-Sierra, Inc.Inventors: Winston Ki-Cheong Mok, Scott A. Muma, Nicholas W. Rolheiser
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Patent number: 7656791Abstract: Disclosed techniques include a method and apparatus that allow traffic to be switched between a working copy and a protected copy hitlessly. The control method simplifies implementation by advantageously distinguishing points within the apparatus wherein the working and protect streams should be virtually identical and aligned and points where the streams need only be identical but are tolerant of skew.Type: GrantFiled: July 19, 2007Date of Patent: February 2, 2010Assignee: PMC-Sierra, Inc.Inventors: Winston Ki-Cheong Mok, Pascal Routhier
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Patent number: 7492760Abstract: A method of time division multiplex switching reduces the implementation area by reducing the area required for both memory storage at each egress port and the multiplexing circuitry required. Ingress and egress processors are implemented to control the storage and selection of data grains to allow for the reduction in the memory and multiplexer areas.Type: GrantFiled: March 31, 2004Date of Patent: February 17, 2009Assignee: PMC-Sierra, Inc.Inventors: Patrice Plante, Carl Dietz McCrosky, Winston Ki-Cheong Mok, Pierre Talbot
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Patent number: 7468974Abstract: A Forward Propagation Architecture is a novel switch architecture based on well-known unicast switching architectures, and provides two desirable properties: (1) no rearrangement of established calls is ever required and (2) the architecture is strictly non-blocking for multicast, even when multicast destinations are dynamically added to existing calls. These properties (excluding dynamic multicast destination addition) can be provided by standard architectures or Time:Space:Time architectures with speedup proportional to the width of the widest multicast to be supported. The speedup required by the FPA is constant and practical (approximately 4× speedup) and at significantly less hardware cost than n2 architectures. The key to the FPA's capability is a sequentially doubled fabric with a feedback loop. The FPA requires a routing algorithm for connection setting. The connection-setting algorithm is sufficiently simple to be implemented in hardware.Type: GrantFiled: September 22, 2004Date of Patent: December 23, 2008Assignee: PMC-Sierra, Inc.Inventors: Larrie Simon Carr, Winston Ki-Cheong Mok, Kenneth Evert Sailor