Patents by Inventor Wolfgang Friza

Wolfgang Friza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11787686
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: October 17, 2023
    Assignee: Infineon Technologies AG
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Publication number: 20230224657
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer are removed.
    Type: Application
    Filed: March 15, 2023
    Publication date: July 13, 2023
    Inventors: Alfons Dehe, Stefan Barzen, Wolfgang Friza, Wolfgang Klein
  • Patent number: 11414320
    Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: August 16, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfred Sigl, Wolfgang Friza, Stefan Geissler
  • Patent number: 11223904
    Abstract: A method for manufacturing an opening structure is provided. The method may include: forming a patterned mask over a first side of a carrier; forming material over the first side of the carrier covering at least a portion of the carrier; forming a first opening in the carrier from a second side of the carrier opposite the first side of the carrier to at least partially expose a surface of the patterned mask; and forming a second opening in the material from the second side of the carrier using the patterned mask as a mask.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: January 11, 2022
    Assignee: Infineon Technologies AG
    Inventor: Wolfgang Friza
  • Publication number: 20210363002
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Application
    Filed: August 5, 2021
    Publication date: November 25, 2021
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Patent number: 11180362
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: November 23, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Publication number: 20210017019
    Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
    Type: Application
    Filed: October 7, 2020
    Publication date: January 21, 2021
    Inventors: Alfred Sigl, Wolfgang Friza, Stefan Geissler
  • Patent number: 10889492
    Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: January 12, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfred Sigl, Wolfgang Friza, Stefan Geissler
  • Patent number: 10766766
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: September 8, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Publication number: 20200277183
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Publication number: 20200015017
    Abstract: A method for manufacturing an opening structure is provided. The method may include: forming a patterned mask over a first side of a carrier; forming material over the first side of the carrier covering at least a portion of the carrier; forming a first opening in the carrier from a second side of the carrier opposite the first side of the carrier to at least partially expose a surface of the patterned mask; and forming a second opening in the material from the second side of the carrier using the patterned mask as a mask.
    Type: Application
    Filed: September 4, 2019
    Publication date: January 9, 2020
    Inventor: Wolfgang FRIZA
  • Patent number: 10469948
    Abstract: A method for manufacturing an opening structure is provided. The method may include: forming a patterned mask over a first side of a carrier; forming material over the first side of the carrier covering at least a portion of the carrier; forming a first opening in the carrier from a second side of the carrier opposite the first side of the carrier to at least partially expose a surface of the patterned mask; and forming a second opening in the material from the second side of the carrier using the patterned mask as a mask.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies AG
    Inventor: Wolfgang Friza
  • Patent number: 10464807
    Abstract: A semiconductor device is proposed. The semiconductor device comprises a membrane structure having an opening. Furthermore, the semiconductor device comprises a first backplate structure, which is arranged on a first side of the membrane structure, and a second backplate structure, which is arranged on a second side of the membrane structure. The semiconductor device furthermore comprises a vertical connection structure, which connects the first backplate structure to the second backplate structure. In this case, the vertical connection structure extends through the opening.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Stefan Barzen, Wolfgang Friza, Marc Fueldner
  • Publication number: 20190297441
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer are removed.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 26, 2019
    Inventors: Alfons Dehe, Stefan Barzen, Wolfgang Friza, Wolfgang Klein
  • Patent number: 10405118
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer is removed.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: September 3, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfons Dehe, Stefan Barzen, Wolfgang Friza, Wolfgang Klein
  • Patent number: 10405099
    Abstract: A MEMS device is provided. The MEMS device includes a membrane, and at least one electrode arranged at a distance from the membrane. The at least one electrode includes a layer stack. The layer stack includes a first insulation layer, a first conductive layer arranged thereabove, a second insulation layer arranged thereabove, a second conductive layer arranged thereabove, and a third insulation layer arranged thereabove.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: September 3, 2019
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Stefan Jost, Wolfgang Friza, Stefan Geissler, Soenke Pirk
  • Publication number: 20190241431
    Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 8, 2019
    Inventors: Alfred Sigl, Wolfgang Friza, Stefan Geissler
  • Publication number: 20190071303
    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.
    Type: Application
    Filed: August 22, 2018
    Publication date: March 7, 2019
    Inventors: Andre Brockmeier, Wolfgang Friza, Daniel Maurer
  • Publication number: 20180170745
    Abstract: A semiconductor device is proposed. The semiconductor device comprises a membrane structure having an opening. Furthermore, the semiconductor device comprises a first backplate structure, which is arranged on a first side of the membrane structure, and a second backplate structure, which is arranged on a second side of the membrane structure. The semiconductor device furthermore comprises a vertical connection structure, which connects the first backplate structure to the second backplate structure. In this case, the vertical connection structure extends through the opening.
    Type: Application
    Filed: November 15, 2017
    Publication date: June 21, 2018
    Inventors: Stefan Barzen, Wolfgang Friza, Marc Fueldner
  • Publication number: 20180152793
    Abstract: A MEMS device is provided. The MEMS device includes a membrane, and at least one electrode arranged at a distance from the membrane. The at least one electrode includes a layer stack. The layer stack includes a first insulation layer, a first conductive layer arranged thereabove, a second insulation layer arranged thereabove, a second conductive layer arranged thereabove, and a third insulation layer arranged thereabove.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 31, 2018
    Inventors: Stefan JOST, Wolfgang FRIZA, Stefan GEISSLER, Soenke PIRK