Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A stacked multi-junction solar cell with a back-contacted front side, having a germanium substrate that forms a rear side of the multi-junction solar cell, a germanium sub-cell and at least two III-V sub-cells, successively in the named order, and at least one passage contact opening that extends from the front side of the multi-junction solar cell through the sub-cells to the rear side and a metallic connection contact that is guided through the passage contact opening. A diameter of the passage contact opening decreases in steps from the front side to the rear side of the multi-junction solar cell. The front side of the germanium sub-cell forms a first step having a first tread depth that circumferentially projects into the passage contact opening. The second step with a second tread depth circumferentially projects into the passage contact opening.

Abstract: A solar cell contact arrangement, having a semiconductor body with a top and a bottom, wherein the semiconductor body has multiple solar cell stacks and includes a support substrate on the bottom, and each solar cell stack has at least two III-V subcells arranged on the support substrate and at least one through-contact extending from the top to the bottom of the semiconductor body with a continuous side wall, wherein the through-contact has a first edge region on the top and a second edge region on the bottom, and the first edge region has a first section and a second, metallic section, and the second edge region has a first section and a second section, wherein the respective second sections completely enclose the respective first sections, and an insulating layer.

Abstract: A method for plating by means of a through-hole on a semiconductor wafer at least comprising the steps: providing a semiconductor wafer having a top side and a bottom side, wherein the semiconductor wafer has a plurality of solar cell stacks and comprises a substrate on the bottom side, and each solar cell stack has at least two III-V subcells, disposed on the substrate, and at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall, wherein the through-hole has a first edge region on the top side and a second edge region on the bottom side; applying an insulating layer to part of the first edge region, the side wall, and to the second edge region by means of a first printing process; and applying an electrically conductive layer.

Abstract: A dicing method for separating a wafer comprising a plurality of solar cells stack along at least one parting line, at least having the steps of: providing the wafer with a top, a bottom, an adhesive layer which is integrally bonded with the top and a cover glass layer which is integrally bonded with the adhesive layer, wherein the wafer includes a plurality of solar cell stacks, each having a germanium substrate layer forming the bottom of the wafer, a germanium sub-cell and at least two III-V sub-cells; creating a separating trench along the parting line by means of laser ablation, which extends from a bottom of the wafer through the wafer and the adhesive layer at least up to a top of the cover glass layer; and dividing the cover glass layer along the separating trench.

Abstract: A stacked multi-junction solar cell with a metallization comprising a multilayer system, wherein the multi-junction solar cell has a germanium substrate forming a bottom side of the multi-junction solar cell, a germanium subcell, and at least two III-V subcells, the multilayer system of the metallization has a first layer, comprising gold and germanium, a second layer comprising titanium, a third layer, comprising palladium or nickel or platinum, with a layer thickness, and at least one metallic fourth layer, and the multilayer system of the metallization covers at least one first and second surface section and is integrally connected to the first and second surface section, wherein the first surface section is formed by the dielectric insulation layer and the second surface section is formed by the germanium substrate or by a III-V layer.

Abstract: A marking method for applying a unique identification to each individual solar cell stack of a semiconductor wafer, at least comprising the steps: Providing a semiconductor wafer having an upper side and an underside, which comprises a Ge substrate forming the underside; and generating an identification with a unique topography by means of laser ablation, using a first laser, on a surface area of the underside of each solar cell stack of the semiconductor wafer, the surface area being formed in each case by the Ge substrate or by an insulating layer covering the Ge substrate.

Abstract: A two-step hole etching method including: providing a semiconductor wafer which has a plurality of solar cell stacks and performing a first and a second processing step. In the first processing step, a first resist layer is applied to a top surface of the semiconductor wafer, at least a first opening is produced in the first resist layer and, via a first etching process, a hole which extends beyond a p/n junction of the Ge sub-cell into the semiconductor wafer is produced in the area of the first opening. In the second process step a second resist layer is applied to the top surface of the semiconductor wafer, a second opening greater than the first opening and surrounding the hole is produced in the second resist layer, and, the hole is widened in an area which extends to the Ge sub-cell serving as an etch stop layer.

Abstract: A light receiving unit having a first energy source made up of two sub sources. A first terminal contact is formed at the upper face of the first sub source and a second terminal contact is formed at the lower face of the second sub source. The sub source has at least one semiconductor diode that has an absorption edge adapted to a first wavelength of light and the second semiconductor diode has an absorption edge adapted to a second wavelength of light which is different from the first wavelength of light, such that the first sub source generates electric voltage upon being irradiated with the first wavelength of light and the second sub source generates electric voltage upon being irradiated with the second wavelength of light.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A metallization method for a semiconductor wafer having at least the steps: providing a semiconductor wafer having a top side and a bottom side and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming the bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section, applying a photoresist layer in certain areas as a resist pattern by means of a printing method to the top side and/or to bottom side of the semiconductor wafer, applying a metal layer in a planar manner to exposed regions of the surface of the semiconductor wafer.

Abstract: A stacked multi-junction solar cell with a back-contacted front side, having a germanium substrate that forms a rear side of the multi-junction solar cell, a germanium sub-cell and at least two III-V sub-cells, successively in the named order, and at least one passage contact opening that extends from the front side of the multi-junction solar cell through the sub-cells to the rear side and a metallic connection contact that is guided through the passage contact opening. A diameter of the passage contact opening decreases in steps from the front side to the rear side of the multi-junction solar cell. The front side of the germanium sub-cell forms a first step having a first tread depth that circumferentially projects into the passage contact opening. The second step with a second tread depth circumferentially projects into the passage contact opening.

Abstract: A dicing method for separating a wafer comprising a plurality of solar cells stack along at least one parting line, at least having the steps of: providing the wafer with a top, a bottom, an adhesive layer which is integrally bonded with the top and a cover glass layer which is integrally bonded with the adhesive layer, wherein the wafer includes a plurality of solar cell stacks, each having a germanium substrate layer forming the bottom of the wafer, a germanium sub-cell and at least two III-V sub-cells; creating a separating trench along the parting line by means of laser ablation, which extends from a bottom of the wafer through the wafer and the adhesive layer at least up to a top of the cover glass layer; and dividing the cover glass layer along the separating trench.

Abstract: A two-step hole etching method including: providing a semiconductor wafer which has a plurality of solar cell stacks and performing a first and a second processing step. In the first processing step, a first resist layer is applied to a top surface of the semiconductor wafer, at least a first opening is produced in the first resist layer and, via a first etching process, a hole which extends beyond a p/n junction of the Ge sub-cell into the semiconductor wafer is produced in the area of the first opening. In the second process step a second resist layer is applied to the top surface of the semiconductor wafer, a second opening greater than the first opening and surrounding the hole is produced in the second resist layer, and, the hole is widened in an area which extends to the Ge sub-cell serving as an etch stop layer.

Abstract: A stacked multi-junction solar cell with a metallization comprising a multilayer system, wherein the multi-junction solar cell has a germanium substrate forming a bottom side of the multi-junction solar cell, a germanium subcell, and at least two III-V subcells, the multilayer system of the metallization has a first layer, comprising gold and germanium, a second layer comprising titanium, a third layer, comprising palladium or nickel or platinum, with a layer thickness, and at least one metallic fourth layer, and the multilayer system of the metallization covers at least one first and second surface section and is integrally connected to the first and second surface section, wherein the first surface section is formed by the dielectric insulation layer and the second surface section is formed by the germanium substrate or by a III-V layer.

Abstract: A marking method for applying a unique identification to each individual solar cell stack of a semiconductor wafer, at least comprising the steps: Providing a semiconductor wafer having an upper side and an underside, which comprises a Ge substrate forming the underside; and generating an identification with a unique topography by means of laser ablation, using a first laser, on a surface area of the underside of each solar cell stack of the semiconductor wafer, the surface area being formed in each case by the Ge substrate or by an insulating layer covering the Ge substrate.

Abstract: An optocoupler having a transmitter unit and a receiver unit being electrically isolated from each other and optically coupled with each other and integrated into a shared housing. The receiver unit includes an energy source that has a first electrical contact and a second electrical contact. The transmitter unit includes at least one first transmitter diode having a first optical wavelength and a second transmitter diode having a second optical wavelength. The first optical wavelength differing from the second optical wavelength by a difference wavelength, and the energy source of the receiving unit including two partial sources. The energy source being designed as a current source or as a voltage source, and the first partial source including a first semiconductor diode, and the second partial source including a second semiconductor diode. Each partial source having multiple semiconductor layers for each partial source being arranged in the shape of a stack.

Abstract: A device having a multi-junction solar cell and a protection diode structure, whereby the multi-junction solar cell and the protection diode structure have a common rear surface and front sides separated by a mesa trench. The common rear surface comprises an electrically conductive layer, and the light enters through the front side into the multi-junction solar cell. The cell includes a stack of a plurality of solar cells, and has a top cell, placed closest to the front side, and a bottom solar cell, placed closest to the rear side, and a tunnel diode is placed between adjacent solar cells. The number of semiconductor layers in the protection diode structure is smaller than the number of semiconductor layers in the multi-junction solar cell. The sequence of the semiconductor layers in the protection diode structure corresponds to the sequence of semiconductor layers of the multi-junction solar cell.

Abstract: A method for producing a light-emitting diode with a stacked structure, having a first region and a second region and a third region, wherein all three regions have a substrate and an n-doped lower cladding layer and an active layer generating electromagnetic radiation, wherein the active layer includes a quantum well structure, and a p-doped upper cladding layer, and the first region additionally has a tunnel diode formed on the upper cladding layer and composed of a p+ layer and an n+ layer, and an n-doped current distribution layer. The current distribution layer and the n-doped contact layer are covered with a conductive trace. At least the lower cladding layer, the active layer, the upper cladding layer, the tunnel diode, and the current distribution layer are monolithic in design. The second region has a contact hole with a bottom region.