Patents by Inventor Wolfgang Lehnert

Wolfgang Lehnert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11887894
    Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: January 30, 2024
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Günter Denifl, Tobias Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Publication number: 20230395532
    Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 7, 2023
    Applicant: Infineon Technologies AG
    Inventors: Harry Walter SAX, Johann GATTERBAUER, Wolfgang LEHNERT, Evelyn NAPETSCHNIG, Michael ROGALLI
  • Patent number: 11735534
    Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 22, 2023
    Assignee: Infineon Technologies AG
    Inventors: Harry Walter Sax, Johann Gatterbauer, Wolfgang Lehnert, Evelyn Napetschnig, Michael Rogalli
  • Publication number: 20230154978
    Abstract: A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.
    Type: Application
    Filed: November 15, 2021
    Publication date: May 18, 2023
    Inventors: Carsten SCHAEFFER, Patrick HANEKAMP, Oliver HUMBEL, Angelika KOPROWSKI, Wolfgang LEHNERT, Francisco Javier SANTOS RODRIGUEZ
  • Patent number: 11557505
    Abstract: A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: January 17, 2023
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Lehnert, Rudolf Berger, Rudolf Lehner, Gerhard Metzger-Brueckl, Guenther Ruhl
  • Patent number: 11557506
    Abstract: Methods for processing a semiconductor substrate are proposed. An example of a method includes forming cavities in the semiconductor substrate by implanting ions through a first surface of the semiconductor substrate. The cavities define a separation layer in the semiconductor substrate. A semiconductor layer is formed on the first surface of the semiconductor substrate. Semiconductor device elements are formed in the semiconductor layer. The semiconductor substrate is separated along the separation layer into a first substrate part including the semiconductor layer and a second substrate part.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 17, 2023
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Werner Schustereder, Alexander Breymesser, Mihai Draghici, Tobias Franz Wolfgang Hoechbauer, Wolfgang Lehnert, Hans-Joachim Schulze, Marko David Swoboda
  • Publication number: 20220415820
    Abstract: A power semiconductor device includes a semiconductor body; a first load terminal at the semiconductor body; and a second load terminal at the semiconductor body. The power semiconductor device is configured to conduct a load current between the first load terminal and the second load terminal. The first load terminal has a first side and a second side adjoining the semiconductor body. The first load terminal includes: at the first side, an atomic layer deposition (ALD) layer; at the second side, a base layer including copper; and between the ALD layer and the base layer, a coupling layer that includes copper-silicon-nitride (CuSiN).
    Type: Application
    Filed: June 27, 2022
    Publication date: December 29, 2022
    Inventors: Christian Hammer, Matthias Mueller, Wolfgang Lehnert
  • Publication number: 20220355936
    Abstract: A fastening device for releasable connection to a perforated rail of an aircraft and a method of assembly for such a fastening device. The fastening device comprises a housing having at least one locking head portion fixedly connected to the housing, at least one shear pin and an actuating pin. The locking head portion is insertable into a rail hole of the perforated rail and slidable along the longitudinal direction of the perforated rail to a locking position in which the locking head portion engages a slot portion of the perforated rail. The shear pin can be engaged with a rail hole of the perforated rail by axial displacement. The actuating pin is rotatably arranged relative to the housing and connected to the shear pin in such a way that a rotation of the actuating pin causes an axial displacement of the shear pin relative to the housing.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 10, 2022
    Inventors: Andreas PATZLSPERGER, Wolfgang LEHNERT
  • Patent number: 11424201
    Abstract: A method of forming an aluminum oxide layer is provided. The method includes providing a metal surface including at least one metal of a group of metals, the group of metals consisting of copper, aluminum, palladium, nickel, silver, and alloys thereof. The method further includes depositing an aluminum oxide layer on the metal surface by atomic layer deposition, wherein a maximum processing temperature during the depositing is 280° C., such that the aluminum oxide layer is formed with a surface having a liquid solder contact angle of less than 40°.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: August 23, 2022
    Assignee: Infineon Technologies AG
    Inventors: Michael Rogalli, Johann Gatterbauer, Wolfgang Lehnert, Kurt Matoy, Evelyn Napetschnig, Manfred Schneegans, Bernhard Weidgans
  • Publication number: 20220230919
    Abstract: A method of manufacturing a semiconductor package is provided. The method may include singulating a wafer including a plurality of dies fixed to an auxiliary carrier to generate dies having released side surfaces, covering at least the side surfaces of the dies with a passivation layer using a deposition process at a temperature below the melting temperature of the auxiliary carrier, keeping a gap between the passivation layers at the side surfaces of adjacent dies of the plurality of dies.
    Type: Application
    Filed: January 13, 2022
    Publication date: July 21, 2022
    Applicant: Infineon Technologies AG
    Inventors: Fabian CRAES, Wolfgang LEHNERT, Maik LOHMANN, Harry Walter SAX
  • Patent number: 11373863
    Abstract: A wafer composite includes a handle substrate, an auxiliary layer formed on a first main surface of the handle substrate, and a silicon carbide structure formed over the auxiliary layer. The handle substrate is subjected to laser radiation that modifies crystalline material along a focal plane in the handle substrate. The focal plane is parallel to the first main surface. The auxiliary layer is configured to stop propagation of microcracks that the laser radiation may generate in the handle substrate.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: June 28, 2022
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Mihai Draghici, Tobias Franz Wolfgang Hoechbauer, Wolfgang Lehnert, Matteo Piccin
  • Patent number: 11328935
    Abstract: A method of forming a layer structure is provided. The method may include plasma-treating a metal surface with a hydrogen-containing plasma, thereby forming nucleophilic groups over the metal surface, and forming an organic layer over the metal surface, wherein the organic layer comprises silane and is covalently bonded to the nucleophilic groups.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: May 10, 2022
    Assignee: Infineon Technologies AG
    Inventors: Johann Gatterbauer, Wolfgang Lehnert, Norbert Mais, Verena Muhr, Edmund Riedl, Harry Sax
  • Publication number: 20210375792
    Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 2, 2021
    Applicant: Infineon Technologies AG
    Inventors: Harry Walter SAX, Johann GATTERBAUER, Wolfgang LEHNERT, Evelyn NAPETSCHNIG, Michael ROGALLI
  • Publication number: 20210351077
    Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Inventors: Francisco Javier Santos Rodriguez, Günter Denifl, Tobias Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11107732
    Abstract: A method for processing a wide band gap semiconductor wafer is proposed. The method includes depositing a non-monocrystalline support layer at a back side of a wide band gap semiconductor wafer, depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer, and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer including at least a part of the epitaxial layer, and a remaining wafer including the non-monocrystalline support layer.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 31, 2021
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Guenter Denifl, Tobias Franz Wolfgang Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Publication number: 20210159115
    Abstract: Methods for processing a semiconductor substrate are proposed. An example of a method includes forming cavities in the semiconductor substrate by implanting ions through a first surface of the semiconductor substrate. The cavities define a separation layer in the semiconductor substrate. A semiconductor layer is formed on the first surface of the semiconductor substrate. Semiconductor device elements are formed in the semiconductor layer. The semiconductor substrate is separated along the separation layer into a first substrate part including the semiconductor layer and a second substrate part.
    Type: Application
    Filed: November 25, 2020
    Publication date: May 27, 2021
    Inventors: Werner SCHUSTEREDER, Alexander BREYMESSER, Mihai DRAGHICI, Tobias Franz Wolfgang HOECHBAUER, Wolfgang LEHNERT, Hans-Joachim SCHULZE, Marko David SWOBODA
  • Patent number: 10903078
    Abstract: A method for processing a silicon carbide wafer includes implanting ions into the silicon carbide wafer to form an absorption layer in the silicon carbide wafer. The absorption coefficient of the absorption layer is at least 100 times the absorption coefficient of silicon carbide material of the silicon carbide wafer outside the absorption layer, for light of a target wavelength. The silicon carbide wafer is split along the absorption layer at least by irradiating the silicon carbide wafer with light of the target wavelength to obtain a silicon carbide device wafer and a remaining silicon carbide wafer.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: January 26, 2021
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Alexander Breymesser, Guenter Denifl, Mihai Draghici, Bernhard Goller, Tobias Franz Wolfgang Hoechbauer, Wolfgang Lehnert, Roland Rupp, Werner Schustereder
  • Publication number: 20210013090
    Abstract: A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 14, 2021
    Inventors: Wolfgang Lehnert, Rudolf Berger, Rudolf Lehner, Gerhard Metzger-Brueckl, Guenther Ruhl
  • Publication number: 20200357637
    Abstract: A wafer composite includes a handle substrate, an auxiliary layer formed on a first main surface of the handle substrate, and a silicon carbide structure formed over the auxiliary layer. The handle substrate is subjected to laser radiation that modifies crystalline material along a focal plane in the handle substrate. The focal plane is parallel to the first main surface. The auxiliary layer is configured to stop propagation of microcracks that the laser radiation may generate in the handle substrate.
    Type: Application
    Filed: May 7, 2020
    Publication date: November 12, 2020
    Inventors: Roland Rupp, Mihai Draghici, Tobias Franz Wolfgang Hoechbauer, Wolfgang Lehnert, Matteo Piccin
  • Patent number: 10784145
    Abstract: A wafer composite is provided which includes an auxiliary substrate, a donor substrate and a sacrificial layer formed between the auxiliary substrate and the donor substrate. Functional elements of the semiconductor component are formed in a component layer, including at least one partial layer of the donor substrate. The auxiliary substrate is then separated from the component layer by heat input into the sacrificial layer.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: September 22, 2020
    Assignee: Infineon Technologies AG
    Inventors: Rudolf Berger, Wolfgang Lehnert, Gerhard Metzger-Brueckl, Guenther Ruhl, Roland Rupp