Abstract: Provided is a memory device formed using quantum devices and a method for manufacturing the same. A memory device comprises a substrate; a source region and a drain region formed in the substrate so as to be separated from each other by a predetermined interval; a memory cell which is formed on the surface of the substrate to connect the source region and the drain region, and has a plurality of nano-sized quantum dots filled with material for storing electrons; and a control gate which is formed on the memory cell and controls the number of electrons stored in the memory cell. It is possible to embody a highly efficient and highly integrated memory device by providing a memory device having nano-sized quantum dots and a method for manufacturing the same.

Abstract: Provided is a memory device formed using quantum devices and a method for manufacturing the same. A memory device comprises a substrate; a source region and a drain region formed in the substrate so as to be separated from each other by a predetermined interval; a memory cell which is formed on the surface of the substrate to connect the source region and the drain region, and has a plurality of nano-sized quantum dots filled with material for storing electrons; and a control gate which is formed on the memory cell and controls the number of electrons stored in the memory cell. It is possible to embody a highly efficient and highly integrated memory device by providing a memory device having nano-sized quantum dots and a method for manufacturing the same.

Abstract: A method of manufacturing an inorganic nanotube using a carbon nanotube (CNT) as a template, includes preparing a template on which a CNT or a CNT array is formed, forming an inorganic thin film on the CNT by depositing an inorganic material on the template using atomic layer deposition (ALD), and removing the CNT to obtain an inorganic nanotube or an inorganic nanotube array, respectively.

Abstract: A nonvolatile memory device includes a substrate having a source region; a nanotube array including a plurality of nanotube columns that are vertically grown on the substrate such that a first end of the nanotube array is in contact with the source region, the nanotube array functioning as an electron transport channel; a memory cell formed around an outer side surface of the nanotube array; a control gate formed around an outer side surface of the memory cell; and a drain region in contact with a second end of the nanotube array and the memory cell, wherein the second end of the nanotube array is distal to the first end of the nanotube array.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: In a method of forming a conductive line for a semiconductor device using a carbon nanotube and a semiconductor device manufactured using the method, the method includes activating a surface of an electrode of the semiconductor device using surface pretreatment to create an activated surface of the electrode, forming an insulating layer on the activated surface of the electrode, and forming a contact hole through the insulating layer to expose a portion of the activated surface of the electrode, and supplying a carbon-containing gas onto the activated surface of the electrode through the contact hole to grow a carbon nanotube, which forms the conductive line, on the activated surface of the electrode. Alternatively, the activation step of the surface of the electrode may be replaced with a formation of a catalytic metal layer on the surface of the electrode.

Abstract: An electron emission lithography apparatus and method using a selectively grown carbon nanotube as an electron emission source, wherein the electron emission lithography apparatus includes an electron emission source installed within a chamber and a stage, which is separated from the electron emission source by a predetermined distance and on which a sample is mounted, and wherein the electron emission source is a carbon nanotube having electron emission power. Since a carbon nanotube is used as an electron emission source, a lithography process can be performed with a precise critical dimension that prevents a deviation from occurring between the center of a substrate and the edge thereof and may realize a high throughput.

Abstract: A memory device using vertical nanotubes includes an array of first electrodes arranged in strips in a first direction, a dielectric layer deposited on the array of first electrodes, the dielectric layer having a plurality of holes arranged therein, an array of nanotubes for emitting electrons, the array of nanotubes contacting the array of first electrodes and vertically growing through the plurality of holes in the dielectric layer, an array of second electrodes arranged in strips in a second direction on the dielectric layer, the array of second electrodes contacting the array of nanotubes, wherein the second direction is perpendicular to the first direction, a memory cell positioned on the array of second electrodes for trapping electrons emitted from the array of nanotubes, and a gate electrode deposited on an upper surface of the memory cell for forming an electric field around the array of nanotubes.

Abstract: A nonvolatile memory device includes a substrate having a source region; a nanotube array including a plurality of nanotube columns that are vertically grown on the substrate such that a first end of the nanotube array is in contact with the source region, the nanotube array functioning as an electron transport channel; a memory cell formed around an outer side surface of the nanotube array; a control gate formed around an outer side surface of the memory cell; and a drain region in contact with a second end of the nanotube array and the memory cell, wherein the second end of the nanotube array is distal to the first end of the nanotube array.

Abstract: A field emission array adopting carbon nanotubes as an electron emitter source, wherein the array includes a rear substrate assembly including cathodes formed as stripes over a rear substrate and carbon nanotubes; a front substrate assembly including anodes formed as stripes over a front substrate with phosphors being deposited on the anodes, a plurality of openings separated by a distance corresponding to the distance between the anodes in a nonconductive plate, and gates formed as stripes perpendicular to the stripes of anodes on the nonconductive plate with a plurality of emitter openings corresponding to the plurality of openings. The nonconductive plate is supported and separated from the front substrate using spacers. The rear substrate assembly is combined with the front substrate assembly such that the carbon nanotubes on the cathodes project through the emitter openings.

Abstract: A high-density information storage apparatus using electron emission and methods of writing, reading and erasing information using the same are provided. The high-density information storage apparatus includes a lower electrode, a photoconductive layer and a recording medium sequentially provided on the lower electrode, a conductive layer converting unit for making the photoconductive layer conductive, a data write and read unit for writing data to the recording medium or reading data from the recording medium, a data loss preventing unit for preventing loss of data during data write and read operations, and a power supply connected to the lower electrode and the data write and read unit, for supplying voltage necessary for reading and writing data.

Abstract: Carbon nanotubes for use in a fuel cell, a method for fabricating the same, and a fuel cell using the carbon nanotubes for its electrode are provided. The internal and external walls of the carbon nanotubes are doped with nano-sized metallic catalyst particles uniformly to a degree of 0.3-5 mg/cm2. The carbon nanotubes are grown over a carbon substrate using chemical vapor deposition or plasma enhanced chemical vapor deposition. Since the carbon nanotubes have a large specific surface area, and metallic catalyst particles are uniformly distributed over the internal and external walls thereof, the reaction efficiency in an electrode becomes maximal when the carbon nanotubes are used for the electrode of a fuel cell. The carbon nanotubes fabricated using the method can be applied to form a large electrode. The carbon nanotubes grown over the carbon substrate can be readily applied to an electrode of a fuel cell, providing economical advantages and simplifying the overall electrode manufacturing process.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

Abstract: Semiconductor carbon nanotubes functionalized by hydrogen and a method for fabricating the same, wherein the functional hydrogenated semiconductor carbon nanotubes have chemical bonds between carbon and hydrogen atoms. The semiconductor carbon nanotube fabricating method includes heating carbon nanotubes in a vacuum, dissociating hydrogen molecules in hydrogen gas into hydrogen atoms, and exposing the carbon nanotubes to the hydrogen gas to form chemical bonds between carbon atoms of the carbon nanotubes and the hydrogen atoms. The conversion of metallic carbon nanotubes into semiconductor nanotubes and of semiconductor nanotubes having a relatively narrow energy bandgap into semiconductor nanotubes having a relative wide energy bandgap can be achieved using the method. The functional hydrogenated semiconductor carbon nanotubes may be applied and used in, for example, electronic devices, optoelectronic devices, and energy storage.

Abstract: A field emission array adopting carbon nanotubes as an electron emitter source, wherein the array includes a rear substrate assembly including cathodes formed as stripes over a rear substrate and carbon nanotubes; a front substrate assembly including anodes formed as stripes over a front substrate with phosphors being deposited on the anodes, a plurality of openings separated by a distance corresponding to the distance between the anodes in a nonconductive plate, and gates formed as stripes perpendicular to the stripes of anodes on the nonconductive plate with a plurality of emitter openings corresponding to the plurality of openings. The nonconductive plate is supported and separated from the front substrate using spacers. The rear substrate assembly is combined with the front substrate assembly such that the carbon nanotubes on the cathodes project through the emitter openings.

Abstract: A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.