Abstract: A flat panel display apparatus includes a substrate, a display unit on the substrate, a sealing substrate facing the display unit, a sealing member between the substrate and the sealing substrate surrounding the display unit, a wiring unit between the substrate and the sealing substrate with an area overlapped with the sealing member, the wiring unit comprising a plurality of separate wiring members, and a leading unit comprising a main body unit, a connection unit, and an intermediate unit that are integrally formed and where the leading unit is configured to receive a voltage applied to the wiring unit from an external power source. The connection unit is connected to the wiring unit, the main body unit is connected to the external power source, the intermediate unit is arranged between the connection unit and the main body unit, and a width of the connection unit decreases away from the main body unit.

Abstract: In a flat panel display apparatus having improved sealing and a method of manufacturing the same, the flat panel display apparatus comprises: a substrate; a display unit disposed on the substrate; a sealing substrate facing the display unit; a sealing member interposed between the substrate and the sealing substrate and surrounding the display unit; and a plurality of wiring groups comprising areas overlapping the sealing member between the substrate and the sealing substrate; wherein the wiring groups are disposed so as to surround the display unit, are spaced apart from an area corresponding to an edge of the display unit, and receive voltage from an external power source.

Abstract: Flat panel displays and methods of manufacturing the displays are disclosed. In one embodiment, the flat panel display includes: i) a substrate, ii) a display unit formed over the substrate, iii) an encapsulation substrate formed so as to face the display unit and iv) a sealing member formed between the substrate and the encapsulation substrate so as to substantially surround the display unit. The display may further include i) a wiring unit formed between the substrate and the encapsulation substrate so as to substantially overlap with the sealing member, wherein the wiring unit includes at least one via hole and ii) an inlet unit connected to the wiring unit and connectable to an external power source.

Abstract: A flat panel display apparatus with improved sealing characteristics, and a method of manufacturing the same. The flat panel display apparatus includes a substrate; a display unit disposed on the substrate; a sealing substrate disposed to face the display unit; a sealing member disposed between the substrate and the sealing substrate to surround the display unit; a wiring unit disposed between the substrate and the sealing substrate to overlap the sealing member; a first protective layer disposed between the sealing member and the wiring unit; and inlets formed to be electrically connected to an external power source and the wiring unit to apply a voltage to the wiring unit.

Abstract: A flat panel display apparatus includes a first substrate having a display region, a second substrate facing the first substrate and bonded to the first substrate, a groove portion in an edge of at least one of the first substrate and the second substrate, and a wiring portion and a bonding member arranged in the groove portion. The bonding member contacts the wiring portion. The wiring portion is configured to receive power and to supply heat to the bonding member. The bonding member is configured to bond the first substrate and the second substrate using the heat supplied from the wiring portion disposed in the groove portion.

Abstract: Provided is an apparatus for manufacturing a polysilicon thin film by depositing an amorphous silicon thin film and an upper silicon dioxide substrate on a lower silicon dioxide substrate, forming a conductive thin film on the upper silicon dioxide substrate, and applying an electric field and performing Joule heating to crystallize the amorphous silicon thin film, the apparatus comprising power terminals for elastically contacting both upper ends of the conductive thin film and supplying power to the conductive thin film, and support members for elastically supporting the substrate such that the power terminals closely contact both upper ends of the conductive thin film to form a uniform electric field at the conductive thin film.

Abstract: Disclosed herein is a rapid annealing method in a mixed structure composed of a heat treatment-requiring material, dielectric layer and conductive layer, comprising that during rapid annealing on a predetermined part of the heat treatment-requiring material, by instantaneously generated intense heat due to Joule heating by application of an electric field to the conductive layer, the potential difference between the heat treatment-requiring material and the conductive layer is set lower than the dielectric break-down voltage of the dielectric layer, thereby preventing generation of arc by dielectric breakdown of the dielectric layer during the annealing.

Abstract: In a Joule heat encapsulating apparatus and an encapsulating method using the same, a panel is mounted on a stage, the panel including a thermal-hardening type sealant for surrounding and sealing a display unit formed between a first substrate and a second substrate, a heat-generating wiring overlapping the thermal-hardening type sealant, and an electric current application wiring connected to the heat-generating wiring. A cap is employed to form a sealed space, in which the panel is arranged, between the stage and the cap. An exhaustion mechanism for exhausting air in the sealed space, and a power applying mechanism connected to the electric current application wiring for supplying a current to the heat-generating wiring, are provided. As a result, a stable encapsulating structure which prevents permeation of oxygen or moisture may be easily formed.

Abstract: A flat panel display apparatus includes a substrate; a display unit disposed on the substrate; a sealing substrate disposed to face the display unit; a sealing member disposed between the substrate and the sealing substrate to surround the display unit; a wiring unit disposed between the substrate and the sealing substrate, including a region that overlaps the sealing member, and including a plurality of wiring members that are spaced apart from each other in at least a portion of the region that overlaps the sealing member; and a lead-in unit connected to the wiring unit to apply a voltage to the wiring unit, and formed to be electrically connectable to an external power source.

Abstract: A mother substrate for forming flat panel display apparatuses and a method of manufacturing the same, the mother substrate including a substrate; a plurality of display units on the substrate, the display units being for forming a plurality of flat panel display apparatuses; a sealing substrate facing the display units; sealing members between the substrate and the sealing substrate, the sealing members surrounding each of the display units; a plurality of wiring units between the substrate and the sealing substrate, the wiring units overlapping the sealing members; a connecting unit including a conductive material, the connecting unit connecting adjacent wiring units in one direction and having a width that is greater than a width of each of the wiring units; and inlets connected to the plurality of wiring units and an external power source, the inlets being for applying a voltage to the plurality of wiring units.

Abstract: Provided are a thin film transistor including a polycrystalline silicon layer having improved crystallinity by applying Joule heat to form stress gradient in a glass substrate that is disposed under an amorphous silicon layer from a surface to a predetermined depth of the glass substrate, thereby crystallizing the amorphous silicon layer into a polycrystalline silicon layer, and a method of fabricating the same. The film transistor includes a glass substrate having stress gradient from an upper surface to a predetermined depth, a semiconductor layer disposed on the glass substrate, and formed of a polycrystalline silicon layer crystallized by Joule heating, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes disposed on the interlayer insulating layer, and electrically connected to source and drain regions of the semiconductor layer.

Abstract: An organic electroluminescence apparatus comprises: a substrate having a pixel region and sealing regions; an organic electroluminescence device located in the pixel region of the substrate; and a sealing substrate having a pixel region and sealing regions corresponding to the pixel region and the sealing regions of the substrate. The sealing regions of the sealing substrate comprise conductive layers continuously connected to each other. In a method of manufacturing organic electroluminescence apparatus by sealing the substrate and the sealing substrate using a glass frit, manufacturing costs and process time can be greatly reduced.

Abstract: Provided is an apparatus for manufacturing a polysilicon thin film by depositing an amorphous silicon thin film and an upper silicon dioxide substrate on a lower silicon dioxide substrate, forming a conductive thin film on the upper silicon dioxide substrate, and applying an electric field and performing Joule heating to crystallize the amorphous silicon thin film, the apparatus comprising power terminals for elastically contacting both upper ends of the conductive thin film and supplying power to the conductive thin film, and support members for elastically supporting the substrate such that the power terminals closely contact both upper ends of the conductive thin film to form a uniform electric field at the conductive thin film.

Abstract: Provided are a method of fabricating a polycrystalline silicon thin film using high temperature heat generated by Joule heating induced by application of an electrical field to a conductive layer, which can ensure process stability at high temperature and thus processing time can be reduced and a polycrystalline silicon thin film having excellent crystallinity can be obtained, a polycrystalline thin film using the method and a thin film transistor including the polycrystalline thin film.

Abstract: Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer of a thin film transistor using a polysilicon layer crystallized by a high temperature heat generated by Joule heating of a conductive layer. As a result, a process can be simplified using a gate line included in the thin film transistor as the conductive layer, and the channel region of the semiconductor layer can be formed of polysilicon having a uniform degree of crystallinity. The thin film transistor includes a straight gate line disposed in one direction, a semiconductor layer crossing the gate line, and source and drain electrodes connected to source and drain regions of the semiconductor layer.

Abstract: Disclosed herein is a rapid annealing method in a mixed structure composed of a heat treatment-requiring material, dielectric layer and conductive layer, comprising that during rapid annealing on a predetermined part of the heat treatment-requiring material, by instantaneously generated intense heat due to Joule heating by application of an electric field to the conductive layer, the potential difference between the heat treatment-requiring material and the conductive layer is set lower than the dielectric break-down voltage of the dielectric layer, thereby preventing generation of arc by dielectric breakdown of the dielectric layer during the annealing.

Abstract: The present invention provides a method for preparation of crystallization of amorphous silicon thin film, which comprises providing a forming a amorphous silicon on a dielectric film formed on a transparent substrate; then forming a conductive layer on the top surface of substrate; applying an electric field to the conductive layer so as to generate heat; and crystallization of amorphous silicon thin film by the generated heat.

Abstract: Disclosed is a method for annealing a silicon thin film in a substrate in which an insulation layer and the silicon thin film are subsequently formed. The method includes heating or preheating the silicon thin film within a temperature range at which the substrate is not transformed during the process so as to generate an intrinsic carrier therein, thereby lowering a resistance to a value at which Joule heating is possible; and applying an electric field to the preheated silicon thin film so as to induce Joule heating by means of movement of the carrier, thereby conducting crystallization, eliminating crystal defects, and ensuring crystal growth. When using the method, Joule heating is selectively induced to a-Si thin film, a-Si/Poly-Si thin film or a Poly-Si thin film according to the preheating condition, thereby making a Poly-Si thin film of good quality within a very short time without damaging the substrate.

Abstract: Disclosed is a method for annealing a silicon thin film in a substrate in which an insulation layer and the silicon thin film are subsequently formed. The method includes heating or preheating the silicon thin film within a temperature range at which the substrate is not transformed during the process so as to generate an intrinsic carrier therein, thereby lowering a resistance to a value at which Joule heating is possible; and applying an electric field to the preheated silicon thin film so as to induce Joule heating by means of movement of the carrier, thereby conducting crystallization, eliminating crystal defects, and ensuring crystal growth. When using the method, Joule heating is selectively induced to a-Si thin film, a-Si/Poly-Si thin film or a Poly-Si thin film according to the preheating condition, thereby making a Poly-Si thin film of good quality within a very short time without damaging the substrate.