Abstract: Disclosed are a sensing pixel and an image sensor including the same. The sensing pixel includes a determination region, which includes one or more floating body transistors, and an integration region that is adjacent to a floating body region of one of the one or more floating body transistors, absorbs light to generate an electron-hole pair including an electron and a positive hole, and transfers the electron or the positive hole to the floating body region of the one floating body transistor.

Abstract: An image sensor includes a unit pixel including a plurality of color pixels with a depth pixel. A first signal line group of first signal lines is used to supply first control signals that control operation of the plurality of color pixels, and a separate second signal line group of second signal lines is used to supply second control signals that control operation of the depth pixel.

Abstract: A unit pixel of a depth sensor includes a light-receiver configured to perform photoelectric conversion of an incident light to output an electrical signal and at least two sensors adjacent to the light-receiver to receive the electrical signal from the light-receiver such that a line connecting the sensors forms an angle greater than zero degrees with respect to a first line, the first line passing through a center of the light-receiver in a horizontal direction.

Abstract: A three-dimensional (3D) CMOS image sensor (CIS) that sufficiently absorbs incident infrared-rays (IRs) and includes an infrared-ray (IR) receiving unit formed in a thin epitaxial film, thereby being easily manufactured using a conventional CIS process, a sensor system including the 3D CIS, and a method of manufacturing the 3D CIS, the 3D CIS including an IR receiving part absorbing IRs incident thereto by repetitive reflection to produce electron-hole pairs (EHPs); and an electrode part formed on the IR receiving part and collecting electrons produced by applying a predetermined voltage thereto.

Abstract: A method of fabricating a microlens includes forming layer of photoresist on a substrate, patterning the layer of photoresist, and then reflowing the photoresist pattern. The layer of photoresist is formed by coating the substrate with liquid photoresist whose viscosity is 150 to 250 cp. A depth sensor includes a substrate and photoelectric conversion elements at an upper portion of the substrate, a metal wiring section disposed on the substrate, an array of the microlenses for focusing incident light as beams onto the photoelectric conversion elements and which beams avoid the wirings of the metal wiring section. The depths sensor also includes a layer presenting a flat upper surface on which the microlenses are formed. The layer may be a dedicated planarization layer or an IR filter, interposed between the microlenses and the metal wiring section.

Abstract: Disclosed are a sensing pixel and an image sensor including the same. The sensing pixel includes a determination region, which includes one or more floating body transistors, and an integration region that is adjacent to a floating body region of one of the one or more floating body transistors, absorbs light to generate an electron-hole pair including an electron and a positive hole, and transfers the electron or the positive hole to the floating body region of the one floating body transistor.

Abstract: A unit pixel of a depth sensor includes a light-receiver configured to perform photoelectric conversion of an incident light to output an electrical signal and at least two sensors adjacent to the light-receiver to receive the electrical signal from the light-receiver such that a line connecting the sensors forms an angle greater than zero degrees with respect to a first line, the first line passing through a center of the light-receiver in a horizontal direction.

Abstract: A unit pixel of a depth sensor includes a light-receiver configured to perform photoelectric conversion of an incident light to output an electrical signal and at least two sensors adjacent to the light-receiver to receive the electrical signal from the light-receiver such that a line connecting the sensors forms an angle greater than zero degrees with respect to a first line, the first line passing through a center of the light-receiver in a horizontal direction.

Abstract: A mobile system may comprise a three-dimensional (3D) image sensor on a first surface of the mobile system configured to perform a first sensing to detect proximity of a subject and a second sensing to recognize a gesture of the subject by acquiring distance information for the subject; and/or a display device on the first surface of the mobile system to display results of the first sensing and the second sensing. A mobile system may comprise a light source unit; a plurality of depth pixels; and/or a plurality of color pixels. The light source unit, the plurality of depth pixels, or the plurality of color pixels may be activated based on an operation mode of the mobile system.

Abstract: A 3D image sensor includes a first color filter configured to pass wavelengths of a first region of visible light and wavelengths of infrared light; a second color filter configured to pass wavelengths of a second region of visible light and the wavelengths of infrared light; and an infrared sensor configured to detect the wavelengths of infrared light passed through the first color filter.

Abstract: Provided is a method of operating a semiconductor device, wherein an operating mode is set by adjusting timing of a voltage pulse or by adjusting a voltage level of the voltage pulse.

Abstract: Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure.

Abstract: Provided are a non-volatile memory devices having a stacked structure, and a memory card and a system including the same. A non-volatile memory device may include a substrate. A stacked NAND cell array may have at least one NAND set and each NAND set may include a plurality of NAND strings vertically stacked on the substrate. At least one signal line may be arranged on the substrate so as to be commonly coupled with the at least one NAND set.

Abstract: An image sensor includes a unit pixel including a plurality of color pixels with a depth pixel. A first signal line group of first signal lines is used to supply first control signals that control operation of the plurality of color pixels, and a separate second signal line group of second signal lines is used to supply second control signals that control operation of the depth pixel.

Abstract: A unit pixel of a depth sensor includes a light-receiver configured to perform photoelectric conversion of an incident light to output an electrical signal and at least two sensors adjacent to the light-receiver to receive the electrical signal from the light-receiver such that a line connecting the sensors forms an angle greater than zero degrees with respect to a first line, the first line passing through a center of the light-receiver in a horizontal direction.

Abstract: A three-dimensional color image sensor includes color pixels and depth pixels therein. A semiconductor substrate is provided with a depth region therein, which extends adjacent a surface of the semiconductor substrate. A two-dimensional array of spaced-apart color regions are provided within the depth region. Each of the color regions includes a plurality of different color pixels therein (e.g., red, blue and green pixels) and each of the color pixels within each of the spaced-apart color regions are spaced-apart from all other color pixels within other color regions.

Abstract: Provided are a non-volatile memory device, which may have a stacked structure and may be easily integrated at increased density, and a method of fabricating and using the non-volatile memory device. The non-volatile memory device may include at least one pair of first electrode lines. At least one second electrode line may be between the at least one pair of first electrode lines. At least one data storage layer may be between the at least one pair of first electrode lines and the at least one second electrode line and may locally store a resistance change.

Abstract: A method of fabricating a microlens includes forming layer of photoresist on a substrate, patterning the layer of photoresist, and then reflowing the photoresist pattern. The layer of photoresist is formed by coating the substrate with liquid photoresist whose viscosity is 150 to 250 cp. A depth sensor includes a substrate and photoelectric conversion elements at an upper portion of the substrate, a metal wiring section disposed on the substrate, an array of the microlenses for focusing incident light as beams onto the photoelectric conversion elements and which beams avoid the wirings of the metal wiring section. The depths sensor also includes a layer presenting a flat upper surface on which the microlenses are formed. The layer may be a dedicated planarization layer or an IR filter, interposed between the microlenses and the metal wiring section.

Abstract: Semiconductor devices and semiconductor apparatuses including the same are provided. The semiconductor devices include a body region disposed on a semiconductor substrate, gate patterns disposed on the semiconductor substrate and on opposing sides of the body region, and first and second impurity doped regions disposed on an upper surface of the body region. The gate patterns may be separated from the first and second impurity doped regions by, or greater than, a desired distance, such that the gate patterns do not to overlap the first and second impurity doped regions in a direction perpendicular to the first and second impurity doped regions.

Abstract: Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure.