Abstract: A semiconductor device may include one or more output drivers. An output driver may be adjusted for impedance matching by applying a body voltage to one or more transistors of the output driver. In some examples, the body voltage applied may be based on a comparison between a reference voltage and a voltage at an external terminal. In some examples, the semiconductor device may include a calibration circuit that includes a comparator and an up/down counter that, based on a signal from the comparator, generates a code indicating the body voltage to be applied. The body voltage may be applied by a voltage generator in some examples.

Abstract: A quantum dot light-emitting device including first electrode and a second electrode, a quantum dot layer between the first electrode and the second electrode, a first electron transport layer and a second electron layer disposed between the quantum dot layer and the second electrode. The second electron transport layer is disposed between the quantum dot layer and the first electron transport layer, wherein each of the first electron transport layer and the second electron transport layer includes an inorganic material. A lowest unoccupied molecular orbital energy level of the second electron transport layer is shallower than a lowest unoccupied molecular orbital energy level of the first electron transport layer, and a lowest unoccupied molecular orbital energy level of the quantum dot layer is shallower than a lowest unoccupied molecular orbital energy level of the second electron transport layer. An electronic device including the quantum dot light-emitting device.

Abstract: A light emitting device includes: a first electrode and a second electrode facing each other, an emissive layer disposed between the first electrode and the second electrode and including a quantum dot, an electron auxiliary layer disposed between the emissive layer and the second electrode and including a plurality of nanoparticles, and a polymer layer between a portion of the second electrode and the electron auxiliary layer, wherein the nanoparticles include a metal oxide including zinc, wherein the second electrode has a first surface facing a surface of the electron auxiliary layer and a second surface opposite to the first surface, and the polymer layer is disposed on a portion of the second surface and a portion of the surface of the electron auxiliary layer, and wherein the polymer layer includes a polymerization product of a thiol compound and an unsaturated compound having at least two carbon-carbon unsaturated bonds.

Abstract: A display device comprises a first pixel including a first emission area, a second pixel including a second emission area spaced apart from the first emission area in a first direction, and a bank partitioning the first emission area and the second emission area, wherein the first pixel includes a first alignment electrode, a second alignment electrode, and a third alignment electrode sequentially located, spaced apart from each other in the first direction, and overlapping with the first emission area, first light-emitting elements above, and overlapping with, the first alignment electrode and the second alignment electrode, second light-emitting elements above, and overlapping with, the second alignment electrode and the third alignment electrode, and a dummy electrode between the first emission area and the second emission area, and overlapping with the bank.

Abstract: A light-emitting device including a first electrode, a second electrode, and a light-emitting film disposed between the first electrode and the second electrode, and a method of producing the device. The light-emitting film includes a fluorine-containing organic salt, and quantum dots that do not include cadmium, lead, or a combination thereof, and the fluorine-containing organic salt includes a substituted or unsubstituted C1 to C30 hydrocarbon group, a non-metallic element, fluorine, and at least one of boron or phosphorus, and the non-metallic element includes carbon, nitrogen, oxygen, phosphorus, sulfur, or selenium.

Abstract: Disclosed is a mutant strain having improved aromatic amino acid production capability as a result of the inactivation or weakening of activity of asparaginase which is expressed by ansB gene.

Abstract: An apparatus including reconfigurable interface circuits and associated systems and methods are disclosed herein. An reconfigurable interface circuit may include an output buffer and an input buffer coupled to a connector for respectively generating and receiving signals. The reconfigurable interface circuit may include a control circuit configured to control operation of the input and output buffers along with additional circuits to selectively implement one or more from a set of selectable communication settings.

Abstract: The present disclosure relates to a double sealing check valve for a rice cooker, and more particularly, to a double sealing check valve for a rice cooker that prevents water vapor mixed with rice water and grain dregs from entering the check valve and maintains airtightness during cooking in an automatic water supply type pressure cooker that automatically supplies water and performs pressure cooking.

Abstract: Implementations described herein relate to various structures, integrated assemblies, and memory devices. In some implementations, a semiconductor package may include a substrate having a first plurality of substrate bond pads and a second plurality of substrate bond pads, and a semiconductor die having a first plurality of die bond pads and a second plurality of die bond pads. Each die bond pad, included in the first plurality of die bond pads, may be connected to a corresponding substrate bond pad, included in the first plurality of substrate bond pads, using bump bonding, and each die bond pad, included in the second plurality of die bond pads, may be connected to a corresponding substrate bond pad, included in the second plurality of substrate bond pads, using wire bonding.

Abstract: A keeper device is used in a hybrid loop unrolled DFE circuit to selectively output signals from equalizers corresponding to a specific possibility of the values of the previous bit (e.g., logical high or logical low) when DFE technique is not used. Those equalizers corresponding to possibilities other than the specific possibility of the values of the previous bit are disabled in the hybrid loop unrolled DFE circuit. As such, the hybrid loop unrolled DFE circuit saves power when the DFE technique is not used since only a portion of the total equalizers in the hybrid loop unrolled DFE circuit are powered.

Abstract: Systems and methods that may enable alignment of a receiver enable signal with one or more clocking signals. By aligning the receiver operations with the one or more clocking signals, a likelihood of a false or incorrect data capture may be reduced, which may improve operation of a memory system. Reducing a likelihood of incorrect data capture may increase an accuracy of a distortion correction operation of a decision feedback equalizer (DFE).

Abstract: A keeper device is used in a hybrid loop unrolled DFE circuit to selectively output signals from equalizers corresponding to a specific possibility of the values of the previous bit (e.g., logical high or logical low) when DFE technique is not used. Those equalizers corresponding to possibilities other than the specific possibility of the values of the previous bit are disabled in the hybrid loop unrolled DFE circuit. As such, the hybrid loop unrolled DFE circuit saves power when the DFE technique is not used since only a portion of the total equalizers in the hybrid loop unrolled DFE circuit are powered.

Abstract: Test input/output speed conversion and related apparatuses and methods are disclosed. An apparatus includes a glue circuit and a BIST circuit for core circuitry of an integrated circuit device. The, the BIST circuit includes a test interface, one or more inputs, and one or more outputs. The BIST circuit is configured to operate at a first speed. The glue circuit is configured to interface with the test interface, the one or more inputs, and the one or more outputs of the BIST circuit. The glue circuit is configured to convert between second speed test interface signals and second speed input/output signals operating at a second speed and first speed test interface signals and first speed input/output signals operating at the first speed. The second speed is different from the first speed.

Abstract: This application relates to a method of synthesizing a speech of which a speed and a pitch are changed. In one aspect, the method includes a spectrogram may be generated by performing a short-time Fourier transformation on a first speech signal based on a first hop length and a first window length, and speech signals of sections having a second window length at the interval of a second hop length from the spectrogram. A ratio between the first hop length and the second hop length may be set to be equal to the value of a playback rate and a ratio between the first window length and the second window length may be set to be equal to the value of a pitch change rate, thereby generating a second speech signal of which the speed and the pitch are changed.

Abstract: A nanocrystal including a core including a Group III element and a Group V element, and a monolayer shell on the surface of the core, the shell including a compound of the formula ZnSexS(1-x), wherein 0?x?1, and wherein an average mole ratio of Se:S in the monolayer shell ranges from about 2:1 to about 20:1.

Abstract: A memory device includes a path state check circuit configured to check states of signal transmission paths, each signal transmission path including a data transmission path and a clock transmission path of the memory device. The path state check circuit includes a sampling circuit configured to perform a sampling operation by using pattern data that has passed through the data transmission path and a clock signal that has passed through the clock transmission path, and generate sample data, and a management circuit configured to generate a comparison of the sample data with the pattern data and manage check result information indicating whether a re-training operation for the memory device is to be performed, based on a result of the comparison.

Abstract: The present application is directed to signal delay control and related apparatuses, systems, and methods. An apparatus includes delay elements and control circuitry electrically connected to the delay elements. The delay elements are configured to receive skewed data signals and delay codes indicating delay quantities. The delay elements are also configured to provide delayed data signals delayed relative to the skewed data signals by the delay quantities. The control circuitry is configured to provide the delay codes, which are selected to reduce a timing skew of the delayed data signals relative to a timing skew of the skewed data signals. A system includes a first device, a second device including the apparatus, and transmission lines electrically connected between the first device and the second device. A method includes calibrating the delay codes.

Abstract: A signal classification method with noise immunity, includes receiving a wireless training signal; combining the wireless training signal with a white Gaussian noise signal, based on a preset desired signal-to-noise ratio (SNR), to generate a modulation signal resulting from modulating an SNR of the wireless training signal to correspond to the preset desired SNR; generating, based on a signal resulting from performing short-time Fourier transform on the modulation signal, a power-based spectrogram image corresponding to the wireless training signal; inputting the power-based spectrogram image and a predetermined supervised learning value corresponding to the wireless training signal into a preset convolution neural network (CNN) model to train the preset CNN model; generating, based on a signal resulting from performing short-time Fourier transform on the wireless evaluation signal, a power-based spectrogram image corresponding to the wireless evaluation signal; and classifying the wireless evaluation signal

Abstract: This application relates to an optical sensor element. In one aspect, the optical sensor element includes a graphite column including one or more graphite rods. The optical sensor element may also include one or more first graphene layers partly or entirely covering each of both ends of the graphite column. The optical sensor element may further include one or more second graphene layers partly or entirely covering the outer circumferential surface of the graphite column. This application also relates to an optical sensor for measuring the concentration of a greenhouse gas and the optical sensor includes the optical sensor element.

Abstract: An automatic dispenser for mixed measurement of grain includes a storage bin having a plurality of holes on a bottom surface and storing grains, a main measurer having a plurality of partitioned measurement compartments and rotatably installed at a position overlapping any one of a plurality of holes provided on the bottom surface of the storage bin, an auxiliary measurer having a plurality of partitioned measurement compartments and installed at a position overlapping the rest of the plurality of holes provided on the bottom surface of the storage bin, the measurement compartment being installed to be rotatable only in one direction with respect to the main measurer, a measurer housing installed below the main measurer and the auxiliary measurer and having a discharge port discharging grains introduced into the main measurer and the auxiliary measurer from the storage bin, and a motor rotating the main measurer in both directions, wherein only the main measurer is used or both the main measurer and the auxil