Patents by Inventor Won Koh

Won Koh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250105155
    Abstract: A semiconductor memory device may include a mold structure that includes mold insulation films and gate electrodes alternately stacked on a first substrate, a channel structure that penetrates the mold structure and intersects the gate electrodes, a block separation region that extends in a first direction parallel to an upper surface of the first substrate and cuts the mold structure, a first dam region and a second dam region spaced apart from each other, that each having a closed loop in a plan view and each cutting the mold structure, pad insulation films in the first and second dam regions that are alternately stacked with the mold insulation films and include a material different from the mold insulation films, and a through via which penetrates through the first substrate, the mold insulation films, and the pad insulation films, in the first dam region but not in the second dam region.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Inventors: Geun Won Lim, Beyoung Hyun Koh, Yong Jin Kwon, Joong Shik Shin
  • Publication number: 20250092540
    Abstract: A catalyst electrode for production of 2,5-furandicarboxylic acid according to an embodiment of the present invention includes: a first metal substrate; and a second metal hydroxide coating layer located on a surface of the first metal substrate, wherein the first metal substrate includes one or more micro-sized first metal particles on the surface thereof, and the second metal hydroxide coating layer may be located on a surface of the first metal particles.
    Type: Application
    Filed: January 16, 2024
    Publication date: March 20, 2025
    Inventors: Dong Ki LEE, Ung LEE, Hyung-Suk OH, Byoung Koun MIN, Dahye WON, Jai Hyun KOH, Woong Hee LEE, Jongin WOO, Byeong Cheul MOON
  • Patent number: 12247175
    Abstract: The present invention relates to a method for upgrading heavy oil by using byproducts of coke production, and particularly provides a method for upgrading heavy oil comprising the steps of: a) mixing heavy oil with byproducts of coke production to produce a mixed liquid: and b) subjecting the mixed liquid to pyrolysis, the method allowing reduction of the amount of coke generated and thus being economical and effective.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: March 11, 2025
    Assignees: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, RESEARCH INSTITUTE OF INDUSTRIAL SCIENCE & TECHNOLOGY
    Inventors: Sunyoung Park, Pill Won Seo, Ki Hyuk Kang, Narae Kang, Gyoo Tae Kim, Chi Woong Ahn, Joon Woo Kim, Dong Jun Koh
  • Publication number: 20250077340
    Abstract: Disclosed herein is a method for managing memory in a memory disaggregation environment. The method includes handling a required subblock within a block more preferentially than an additional block in the event of a page fault and handling a page fault for the block in which the required subblock is preferentially processed.
    Type: Application
    Filed: July 29, 2024
    Publication date: March 6, 2025
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Chang-Dae KIM, Eun-Ji PAK, Yeon-Jeong JEONG, Sang-Hoon KIM
  • Publication number: 20250077261
    Abstract: Disclosed herein is a method for improving performance of a hypervisor in a memory disaggregation environment. The method includes allocating memory pages to a virtual machine in preset units, comparing the address range of the page frame to be returned with a preset page size, and removing an address space mapping for the page frame to be returned depending on a result of comparison with the preset page size. Removing the address space mapping comprises removing the address space mapping on the basis of contiguous page frames when the range of the page frame to be returned is equal to or greater than the preset page size.
    Type: Application
    Filed: June 18, 2024
    Publication date: March 6, 2025
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Chang-Dae KIM, Eun-Ji PAK, Yeon-Jeong JEONG, Sang-Hoon KIM
  • Patent number: 12226073
    Abstract: The present invention relates to an endoscope including a connector configured to be coupled to an external device and receive power from the external device, wherein the connector includes: a power transmission cable configured to transmit power to a bendable section; a power receiving part comprising a first slider configured to move in a first direction by receiving power from the external device and a second slider configured to move in a second direction by receiving power from the external device like the first slider; and a power transmission part configured to receive power from the power receiving part and transmit the same to the power transmission cable.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: February 18, 2025
    Assignee: MEDINTECH INC.
    Inventors: Chi Won Lee, Myung Joon Kim, Suk Gyu Koh
  • Patent number: 12220106
    Abstract: The present invention relates an endoscope, including: a bendable section configured to be inserted into a subject's body to collect image information; and a power transmission means configured to transmit power provided by the power source to the bendable section, wherein the power transmission means comprises a power-transmitting mechanical cord and a friction control part configured to promote or restrain a movement of the mechanical cord.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: February 11, 2025
    Assignee: MEDINTECH INC.
    Inventors: Chi Won Lee, Myung Joon Kim, Suk Gyu Koh
  • Patent number: 12223186
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: February 11, 2025
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Chang-Dae Kim, Kwang-Won Koh, Kang-Ho Kim, Tae-Hoon Kim, Sang-Ho Eom
  • Patent number: 12153525
    Abstract: Disclosed herein are a method and apparatus for verifying integrity in a memory-disaggregated environment. The method for verifying integrity in a memory-disaggregated environment includes receiving write data and multiple hash values generated based on write data from a remote memory, and verifying integrity of the write data based on the write data and the hash values, wherein verifying the integrity of the write data comprises selecting a hash value for the integrity verification based on an access latency of the remote memory.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: November 26, 2024
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Tae-Hoon Kim, Kwang-Won Koh, Kang-Ho Kim, Chang-Dae Kim, Sang-Ho Eom
  • Patent number: 12118394
    Abstract: An apparatus for memory integrated management in a cluster system including a plurality of physical nodes connected to each other by a network determines one of the plurality of physical nodes as a node to place a new virtual machine, allocates the first type of memory allocated to the one physical node to the new virtual machine as much as the memory capacity required by the new virtual machine, and distributes the second type of memory to a plurality of virtual machines running on the plurality of physical nodes by integrating and managing the second type of memory allocated to each of the plurality of physical nodes. In this case, the access speed of the second type of memory is faster than that of the first type of memory.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: October 15, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Changdae Kim, Kwang-Won Koh, Kang Ho Kim, Taehoon Kim
  • Publication number: 20240295987
    Abstract: A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.
    Type: Application
    Filed: May 9, 2024
    Publication date: September 5, 2024
    Inventors: Kwang-Won KOH, Kang Ho KIM, Changdae KIM, Taehoon KIM
  • Publication number: 20240248418
    Abstract: A substrate processing apparatus includes a photoresist coater applying a photoresist film on a substrate, a humidifier increasing an amount of moisture in an ambient to which the photoresist film on the substrate is exposed, and an exposer irradiating the photoresist film exposed to the ambient having the increased amount of moisture with light. The humidifier is disposed between the photoresist coater and the exposer.
    Type: Application
    Filed: February 7, 2024
    Publication date: July 25, 2024
    Inventors: Seok HEO, Cha Won KOH, Sang Joon HONG, Hyun Woo KIM, Kyung-Won KANG, Dong-Wook KIM, Kyung Won SEO, Young Il JANG, Yong Suk CHOI
  • Patent number: 12008261
    Abstract: A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: June 11, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Kang Ho Kim, Changdae Kim, Taehoon Kim
  • Patent number: 12002548
    Abstract: An apparatus for genome sequence alignment attempts a search for the hash tables to align a target nucleotide sequence, from a hash table having a large seed size to a hash table having a small seed size, and when there is at least one matched seed to the target nucleotide sequence on a hash table, aligns the target nucleotide sequence by using candidate positions from the hash table without further hash table searching.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: June 4, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Changdae Kim, Kwang-Won Koh, Kang Ho Kim
  • Patent number: 11947463
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: April 2, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
  • Patent number: 11927890
    Abstract: A substrate processing apparatus includes a photoresist coater applying a photoresist film on a substrate, a humidifier increasing an amount of moisture in an ambient to which the photoresist film on the substrate is exposed, and an exposer irradiating the photoresist film exposed to the ambient having the increased amount of moisture with light. The humidifier is disposed between the photoresist coater and the exposer.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Heo, Cha Won Koh, Sang Joon Hong, Hyun Woo Kim, Kyung-Won Kang, Dong-Wook Kim, Kyung Won Seo, Young Il Jang, Yong Suk Choi
  • Patent number: 11849005
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: December 19, 2023
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won Koh, Kang-Ho Kim, Chang-Dae Kim, Tae-Hoon Kim, Sang-Ho Eom
  • Publication number: 20230305964
    Abstract: Disclosed herein are a method and apparatus for verifying integrity in a memory-disaggregated environment. The method for verifying integrity in a memory-disaggregated environment includes receiving write data and multiple hash values generated based on write data from a remote memory, and verifying integrity of the write data based on the write data and the hash values, wherein verifying the integrity of the write data comprises selecting a hash value for the integrity verification based on an access latency of the remote memory.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Sang-Ho EOM
  • Publication number: 20230305721
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20230179679
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Tae-Hoon KIM, Sang-Ho EOM