Abstract: A storage system includes a storage device and a host device. The storage device includes a nonvolatile memory device having a first size and a first volatile memory device having a second size smaller than the first size and configured to operate as a cache memory with respect to the nonvolatile memory device. The first volatile memory device is configured to allow a first bus portion access to cache data stored in the first volatile memory device. The host device is configured to generate a cache table corresponding to information in the cache data stored in the first volatile memory device and configured to read the cache data stored in the first volatile memory device via the first bus portion based on the cache table.

Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.

Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.

Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.

Abstract: An electronic system includes a host device and a storage device. The storage device includes a first memory device that is accessed by the host device by units of a byte through a byte accessible interface and a second memory device that is accessed by the host device by units of a block through a block accessible interface. The storage device performs an internal data transfer between the first memory device and the second memory device based on an internal transfer command that is provided through the block accessible interface from the host device. The electronic system may efficiently support the access by units of a byte and the access by units of a block between the host device and the storage device by performing internal data transfer in the storage device using the internal transfer command that is modified from the existing block access command.

Abstract: An electronic system includes a host device and a storage device. The storage device includes a first memory device that is accessed by the host device by units of a byte through a byte accessible interface and a second memory device that is accessed by the host device by units of a block through a block accessible interface. The storage device performs an internal data transfer between the first memory device and the second memory device based on an internal transfer command that is provided through the block accessible interface from the host device. The electronic system may efficiently support the access by units of a byte and the access by units of a block between the host device and the storage device by performing internal data transfer in the storage device using the internal transfer command that is modified from the existing block access command.

Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.

Abstract: A storage system includes a storage device and a host device. The storage device includes a nonvolatile memory device having a first size and a first volatile memory device having a second size smaller than the first size and configured to operate as a cache memory with respect to the nonvolatile memory device. The first volatile memory device is configured to allow a first bus portion access to cache data stored in the first volatile memory device. The host device is configured to generate a cache table corresponding to information in the cache data stored in the first volatile memory device and configured to read the cache data stored in the first volatile memory device via the first bus portion based on the cache table.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.

Abstract: Memory blocks of a nonvolatile memory device are managed by identifying a full memory block, determining whether a block life of the full memory block exceeds a threshold value, and upon determining that the block life of the full memory block exceeds the threshold value, selecting the full memory block as a target block for garbage collection. The threshold of the block life is determined using an average write distance of logical pages programmed in the nonvolatile memory device.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: A method for managing data in a storage device includes: receiving a logical page from a host and calculating an actual time stamp of the logical page; finding a block of the storage device in which the logical page is stored and detecting a time stamp of the block and a page offset of the logical page stored in the block; calculating an approximate time stamp of the logical page stored in the block using the time stamp of the block and the page offset; and determining that the logical page is in a first state if the difference between the actual time stamp and the approximate time stamp is smaller than a threshold value, and determining that the logical page is in a second state different from the first state if the difference between the actual time stamp and the approximate time stamp is larger than the threshold value.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.

Abstract: A method is provided for performing a write operation in a data storage device comprising a storage medium, a processing unit, and a buffer memory storing data to be transferred to the storage medium under control of the processing unit. The method comprises aggregating data in the buffer memory as a strip group comprising multiple data strips, transferring data strips in at least one strip group to the storage medium, calculating a parity strip based on the transferred data strips of the at least one strip group without additional access to the buffer memory, and transferring the parity strip to the storage medium.

Abstract: A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.

Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.