Patents by Inventor Won-Moon Cheon

Won-Moon Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130166824
    Abstract: A method of managing memory blocks in a nonvolatile memory device comprises identifying a full memory block among a plurality of memory blocks in the nonvolatile memory device, determining whether a block life of the full memory block exceeds a threshold value, and upon determining that the block life of the full memory block exceeds the threshold value, selecting the full memory block as a target block for garbage collection.
    Type: Application
    Filed: September 13, 2012
    Publication date: June 27, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: GYU-DONG SHIM, YANG-SUP LEE, WON-MOON CHEON
  • Publication number: 20120166910
    Abstract: A method is provided for performing a write operation in a data storage device comprising a storage medium, a processing unit, and a buffer memory storing data to be transferred to the storage medium under control of the processing unit. The method comprises aggregating data in the buffer memory as a strip group comprising multiple data strips, transferring data strips in at least one strip group to the storage medium, calculating a parity strip based on the transferred data strips of the at least one strip group without additional access to the buffer memory, and transferring the parity strip to the storage medium.
    Type: Application
    Filed: November 21, 2011
    Publication date: June 28, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Publication number: 20120159054
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: February 28, 2012
    Publication date: June 21, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Publication number: 20120151124
    Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.
    Type: Application
    Filed: November 4, 2011
    Publication date: June 14, 2012
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Publication number: 20110296131
    Abstract: A memory controller includes a microprocessor, a queue configured to store a plurality of first commands provided by the microprocessor, a queue management block configured to interpret and control said plurality of first commands, and a command generator configured to provide a plurality of second commands under control of the queue management block. The queue management block may simultaneously perform the plurality of second commands so as to simultaneously access a plurality of non-volatile memory units.
    Type: Application
    Filed: May 27, 2011
    Publication date: December 1, 2011
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Yong Tae YIM, Won Moon CHEON, Jin Yeong KIM, Du-Won HONG, Jong-Min KIM
  • Publication number: 20110219180
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: May 18, 2011
    Publication date: September 8, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 7970981
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 7797481
    Abstract: A memory system and corresponding method of wear-leveling are provided, the system including a controller, a random access memory in signal communication with the controller, and another memory in signal communication with the controller, the other memory comprising a plurality of groups, each group comprising a plurality of first erase units or blocks and a plurality of second blocks, wherein the controller exchanges a first block from a group with a second block in response to at least one block erase count within the group; and the method including receiving a command having a logical address, converting the logical address into a logical block number, determining a group number for a group that includes the converted logical block number, and checking whether group information comprising block erase counts for the group is loaded into random access memory, and if not, loading the group information into random access memory.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-Sup Lee, Chan-Ik Park, Won-Moon Cheon
  • Publication number: 20080313505
    Abstract: A memory system and corresponding method of wear-leveling are provided, the system including a controller, a random access memory in signal communication with the controller, and another memory in signal communication with the controller, the other memory comprising a plurality of groups, each group comprising a plurality of first erase units or blocks and a plurality of second blocks, wherein the controller exchanges a first block from a group with a second block in response to at least one block erase count within the group; and the method including receiving a command having a logical address, converting the logical address into a logical block number, determining a group number for a group that includes the converted logical block number, and checking whether group information comprising block erase counts for the group is loaded into random access memory, and if not, loading the group information into random access memory.
    Type: Application
    Filed: June 29, 2007
    Publication date: December 18, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yang-Sup Lee, Chan-lk Park, Won-Moon Cheon
  • Publication number: 20080195801
    Abstract: Provided is a method for operating a buffer cache which is performed by a storage device including a flash memory. The method includes converting a logical block address requested from a host into a logical page number. A region in which a page corresponding to the logical page number is located is searched for. A physical block address corresponding to the logical block address is generated with reference to a mapping table of the region in which the page corresponding to the logical page number is located. The searching for of the region includes searching for a look-up table having information about a region in which a plurality of pages of the flash memory are located.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 14, 2008
    Inventors: Won-moon Cheon, Chan-ik Park
  • Publication number: 20080189490
    Abstract: A system and method for memory mapping are provided, the system including a logical unit to physical unit map table, data unit groups in signal communication with the map table, and log unit groups, each associated with a corresponding one of the data unit groups, where updated data for any data unit within one of the data unit groups is stored in any log unit within the corresponding one of the log unit groups, and the method including receiving write data for a logical unit number from a host determining which of a plurality of data block groups comprises the logical unit number, and storing the write data in any unfilled log unit of a log block group corresponding to the determined data block group.
    Type: Application
    Filed: August 3, 2007
    Publication date: August 7, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon Cheon, Yang-Sup Lee
  • Publication number: 20080104309
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: February 6, 2007
    Publication date: May 1, 2008
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Publication number: 20080098195
    Abstract: A memory system is disclosed with a file system; a flash translation layer (FTL) receiving a logical address from the file system and translating it into a physical address, and a flash memory receiving the physical address. The FTL includes flag information and offset information, the flag information indicating page order for a memory block in the flash memory is a wrap-around order and the offset information defining a starting page for the memory block.
    Type: Application
    Filed: December 13, 2006
    Publication date: April 24, 2008
    Inventors: Won-Moon Cheon, Yang-Sup Lee
  • Publication number: 20070192634
    Abstract: Provided are a secure multimedia card (secure MMC) and a memory card system having the same. The memory card system may include a host, and a secure MMC having a user data area accessed by a normal command and a restricted area accessed by a secure command, wherein the user data area in communication with the host stores user data and the restricted area stores access restriction data. The restricted area may be accessed in the secure MMC even though the interface unit in the host does not support commands requesting the access to the restricted area in the secure MMC.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Moon CHEON, Chan-Ik PARK, Moon-Sang KWON