Patents by Inventor Won-Taeck JUNG

Won-Taeck JUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200395090
    Abstract: A nonvolatile memory device includes a peripheral circuit region and a memory cell region vertically connected with the peripheral circuit region, the peripheral circuit region including at least one first metal pad, and the memory cell region including at least one second metal pad directly connected with the at least one first metal pad. A method of programming the nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.
    Type: Application
    Filed: July 29, 2020
    Publication date: December 17, 2020
    Inventors: KYUNG-MIN KANG, Dongku Kang, Su Chang Jeon, Won-Taeck Jung
  • Publication number: 20200394106
    Abstract: A method of programming a nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.
    Type: Application
    Filed: November 22, 2019
    Publication date: December 17, 2020
    Inventors: Kyung-Min KANG, Dongku KANG, Su Chang JEON, Won-Taeck JUNG
  • Patent number: 10839910
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: November 17, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 10803947
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: October 13, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 10770148
    Abstract: An operation method of a nonvolatile memory device includes applying a program voltage to a selected word line and programming a selected memory cell connected to the selected word line; reading an adjacent memory cell connected to an adjacent word line of the selected word line; and verifying the selected memory cell by adjusting charge sharing between the selected memory cell and a sensing node, which is connected to the selected memory cell through a bit line.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: September 8, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Taeck Jung, So-Yeong Gwak, Sang-Wan Nam
  • Publication number: 20200194069
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Publication number: 20200143892
    Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.
    Type: Application
    Filed: January 6, 2020
    Publication date: May 7, 2020
    Inventors: WON-TAECK JUNG, SANG-WAN NAM, JINWOO PARK, JAEYONG JEONG
  • Publication number: 20200066347
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: October 31, 2019
    Publication date: February 27, 2020
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Patent number: 10541033
    Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: January 21, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Taeck Jung, Sang-Wan Nam, Jinwoo Park, Jaeyong Jeong
  • Patent number: 10497444
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: December 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 10403363
    Abstract: A nonvolatile memory includes a plurality of memory blocks, a plurality of source drivers corresponding to the plurality of memory blocks, a plurality of pass transistor groups connected between the plurality of source drivers and the plurality of memory blocks, a plurality of block pass transistors connected between a plurality of block word lines and the plurality of pass transistor groups, a plurality of block decoders corresponding to a plurality of memory block groups respectively, and a block pass transistor decoder configured to control voltages of block select lines connected to the plurality of block pass transistors. The plurality of memory blocks are divided into the plurality of memory block groups. Each block decoder is configured to control voltages of block word lines, among the plurality of block word lines, connected to at least two memory blocks of a corresponding memory block group in common.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: September 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Taeck Jung
  • Publication number: 20190088341
    Abstract: An operation method of a nonvolatile memory device includes applying a program voltage to a selected word line and programming a selected memory cell connected to the selected word line; reading an adjacent memory cell connected to an adjacent word line of the selected word line; and verifying the selected memory cell by adjusting charge sharing between the selected memory cell and a sensing node, which is connected to the selected memory cell through a bit line.
    Type: Application
    Filed: April 23, 2018
    Publication date: March 21, 2019
    Inventors: WON-TAECK JUNG, SO-YEONG GWAK, SANG-WAN NAM
  • Publication number: 20180374541
    Abstract: A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.
    Type: Application
    Filed: March 5, 2018
    Publication date: December 27, 2018
    Inventors: WON-TAECK JUNG, SANG-WAN NAM, JINWOO PARK, JAEYONG JEONG
  • Publication number: 20180322923
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: July 17, 2018
    Publication date: November 8, 2018
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Publication number: 20180240522
    Abstract: A nonvolatile memory includes a plurality of memory blocks, a plurality of source drivers corresponding to the plurality of memory blocks, a plurality of pass transistor groups connected between the plurality of source drivers and the plurality of memory blocks, a plurality of block pass transistors connected between a plurality of block word lines and the plurality of pass transistor groups, a plurality of block decoders corresponding to a plurality of memory block groups respectively, and a block pass transistor decoder configured to control voltages of block select lines connected to the plurality of block pass transistors. The plurality of memory blocks are divided into the plurality of memory block groups. Each block decoder is configured to control voltages of block word lines, among the plurality of block word lines, connected to at least two memory blocks of a corresponding memory block group in common.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 23, 2018
    Inventor: WON-TAECK JUNG
  • Patent number: 10043580
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: August 7, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 9978454
    Abstract: A nonvolatile memory includes a plurality of memory blocks and an address decoder. The address decoder is configured to activate a block word line corresponding to the memory blocks in common when one memory block is selected among the memory blocks, supply voltages to word lines of the selected memory block among the memory blocks, and float word lines of an unselected memory block among the memory blocks.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: May 22, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Taeck Jung
  • Publication number: 20180047448
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Patent number: 9799400
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: October 24, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 9570176
    Abstract: An operating method of a nonvolatile memory device includes determining whether a memory block is a selected block, and when the memory block is not the selected block, determining whether the memory block shares a block word line with the selected block. The method further includes applying an unselected block word line voltage to word lines of the memory block when the memory block shares the block word line with the selected block, and floating the word lines of the memory block when the memory block does not share the block word line with the selected block.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Taeck Jung, Tae-Hong Kwon, Tae-Min Park, Ohsuk Kwon