Patents by Inventor Won-Taeck JUNG

Won-Taeck JUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160232973
    Abstract: A nonvolatile memory includes a plurality of memory blocks and an address decoder. The address decoder is configured to activate a block word line corresponding to the memory blocks in common when one memory block is selected among the memory blocks, supply voltages to word lines of the selected memory block among the memory blocks, and float word lines of an unselected memory block among the memory blocks.
    Type: Application
    Filed: January 13, 2016
    Publication date: August 11, 2016
    Inventor: WON-TAECK JUNG
  • Patent number: 9412456
    Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.
    Type: Grant
    Filed: October 25, 2014
    Date of Patent: August 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: DongHun Kwak, Sang-Won Park, Won-Taeck Jung
  • Publication number: 20160148698
    Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
    Type: Application
    Filed: January 29, 2016
    Publication date: May 26, 2016
    Inventors: SANG-WAN NAM, WON-TAECK JUNG, JUNGHOON PARK
  • Publication number: 20160118123
    Abstract: An operating method of a nonvolatile memory device includes determining whether a memory block is a selected block, and when the memory block is not the selected block, determining whether the memory block shares a block word line with the selected block. The method further includes applying an unselected block word line voltage to word lines of the memory block when the memory block shares the block word line with the selected block, and floating the word lines of the memory block when the memory block does not share the block word line with the selected block.
    Type: Application
    Filed: March 25, 2015
    Publication date: April 28, 2016
    Inventors: WON-TAECK JUNG, TAE-HONG KWON, TAE-MIN PARK, OHSUK KWON
  • Patent number: 9281070
    Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 8, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung, Junghoon Park
  • Publication number: 20160035431
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: October 12, 2015
    Publication date: February 4, 2016
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Patent number: 9190151
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: November 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 9147492
    Abstract: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: September 29, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sunil Shim, Jin-Man Han, Sang-Wan Nam, Won-Taeck Jung
  • Publication number: 20150187425
    Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
    Type: Application
    Filed: March 11, 2015
    Publication date: July 2, 2015
    Inventors: SANG-WAN NAM, WON-TAECK JUNG, JUNGHOON PARK
  • Publication number: 20150078087
    Abstract: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 19, 2015
    Inventors: Sunil SHIM, Jin-Man HAN, Sang-Wan NAM, Won-Taeck JUNG
  • Publication number: 20150043283
    Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.
    Type: Application
    Filed: October 25, 2014
    Publication date: February 12, 2015
    Inventors: DongHun KWAK, Sang-Won PARK, Won-Taeck JUNG
  • Publication number: 20150009760
    Abstract: A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.
    Type: Application
    Filed: January 13, 2014
    Publication date: January 8, 2015
    Inventors: SANG-WAN NAM, WON-TAECK JUNG
  • Patent number: 8908431
    Abstract: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sunil Shim, Jinman Han, Sang-Wan Nam, Won-Taeck Jung
  • Patent number: 8902651
    Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: DongHun Kwak, Sang-Won Park, Won-Taeck Jung
  • Publication number: 20130094294
    Abstract: Disclosed are a program method and a nonvolatile memory device. The method includes receiving program data to be programmed in memory cells; reading the memory cells to judge an erase state and at least one program state; performing a state read operation in which the at least one program state is read using a plurality of state read voltages; and programming the program data in the memory cells using a plurality of verification voltages having different levels according to a result of the state read operation. Also disclosed are methods using a plurality of verification voltages selected based on factors which may affect a threshold voltage shift or other characteristic representing the data of a memory cell after programming.
    Type: Application
    Filed: October 10, 2012
    Publication date: April 18, 2013
    Inventors: DongHun KWAK, Sang-Won PARK, Won-Taeck JUNG
  • Publication number: 20130083599
    Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
    Type: Application
    Filed: August 29, 2012
    Publication date: April 4, 2013
    Inventors: SANG-WAN NAM, WON-TAECK JUNG, JUNGHOON PARK
  • Publication number: 20130007353
    Abstract: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
    Type: Application
    Filed: September 7, 2012
    Publication date: January 3, 2013
    Inventors: Sunil SHIM, Jinman HAN, Sang-Wan NAM, Won-Taeck JUNG