Patents by Inventor Won-Moon Cheon

Won-Moon Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11579775
    Abstract: A storage system includes a storage device and a host device. The storage device includes a nonvolatile memory device having a first size and a first volatile memory device having a second size smaller than the first size and configured to operate as a cache memory with respect to the nonvolatile memory device. The first volatile memory device is configured to allow a first bus portion access to cache data stored in the first volatile memory device. The host device is configured to generate a cache table corresponding to information in the cache data stored in the first volatile memory device and configured to read the cache data stored in the first volatile memory device via the first bus portion based on the cache table.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: February 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gun Kim, Won-Moon Cheon
  • Patent number: 11204797
    Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: December 21, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gun Kim, Won-Moon Cheon
  • Publication number: 20200225980
    Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 16, 2020
    Inventors: Dong-Gun KIM, Won-Moon CHEON
  • Patent number: 10599467
    Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gun Kim, Won-Moon Cheon
  • Patent number: 10303617
    Abstract: An electronic system includes a host device and a storage device. The storage device includes a first memory device that is accessed by the host device by units of a byte through a byte accessible interface and a second memory device that is accessed by the host device by units of a block through a block accessible interface. The storage device performs an internal data transfer between the first memory device and the second memory device based on an internal transfer command that is provided through the block accessible interface from the host device. The electronic system may efficiently support the access by units of a byte and the access by units of a block between the host device and the storage device by performing internal data transfer in the storage device using the internal transfer command that is modified from the existing block access command.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: May 28, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gun Kim, Dae-Ho Kim, Hong-Moon Wang, Won-Moon Cheon
  • Publication number: 20180150404
    Abstract: An electronic system includes a host device and a storage device. The storage device includes a first memory device that is accessed by the host device by units of a byte through a byte accessible interface and a second memory device that is accessed by the host device by units of a block through a block accessible interface. The storage device performs an internal data transfer between the first memory device and the second memory device based on an internal transfer command that is provided through the block accessible interface from the host device. The electronic system may efficiently support the access by units of a byte and the access by units of a block between the host device and the storage device by performing internal data transfer in the storage device using the internal transfer command that is modified from the existing block access command.
    Type: Application
    Filed: September 14, 2017
    Publication date: May 31, 2018
    Inventors: DONG-GUN KIM, DAE-HO KIM, HONG-MOON WANG, WON-MOON CHEON
  • Publication number: 20180113736
    Abstract: A computing system includes a host and a storage device. The host includes a central processing unit (CPU) and a first volatile memory device. The storage device includes a second volatile memory device and a nonvolatile memory device. The CPU uses the first volatile memory device and the second volatile memory device as a main memory to store temporary data used for operation of the CPU. The CPU determines a swap-out page to be swapped-out of first pages stored in the first volatile memory device, determines a swap-in page to be swapped-in of second pages stored in the second volatile memory device, and exchanges the swapped-out page and the swapped-in page.
    Type: Application
    Filed: September 22, 2017
    Publication date: April 26, 2018
    Inventors: Dong-Gun Kim, Won-Moon Cheon
  • Publication number: 20180113629
    Abstract: A storage system includes a storage device and a host device. The storage device includes a nonvolatile memory device having a first size and a first volatile memory device having a second size smaller than the first size and configured to operate as a cache memory with respect to the nonvolatile memory device. The first volatile memory device is configured to allow a first bus portion access to cache data stored in the first volatile memory device. The host device is configured to generate a cache table corresponding to information in the cache data stored in the first volatile memory device and configured to read the cache data stored in the first volatile memory device via the first bus portion based on the cache table.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 26, 2018
    Inventors: Dong-Gun Kim, Won-Moon Cheon
  • Patent number: 9886202
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 6, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 9355025
    Abstract: A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: May 31, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gyu-Dong Shim, Won-Moon Cheon, Min-Wook Jung
  • Patent number: 9239780
    Abstract: Memory blocks of a nonvolatile memory device are managed by identifying a full memory block, determining whether a block life of the full memory block exceeds a threshold value, and upon determining that the block life of the full memory block exceeds the threshold value, selecting the full memory block as a target block for garbage collection. The threshold of the block life is determined using an average write distance of logical pages programmed in the nonvolatile memory device.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: January 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-Dong Shim, Yang-Sup Lee, Won-Moon Cheon
  • Publication number: 20150370491
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: August 31, 2015
    Publication date: December 24, 2015
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 9122592
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: September 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 9122585
    Abstract: A method for managing data in a storage device includes: receiving a logical page from a host and calculating an actual time stamp of the logical page; finding a block of the storage device in which the logical page is stored and detecting a time stamp of the block and a page offset of the logical page stored in the block; calculating an approximate time stamp of the logical page stored in the block using the time stamp of the block and the page offset; and determining that the logical page is in a first state if the difference between the actual time stamp and the approximate time stamp is smaller than a threshold value, and determining that the logical page is in a second state different from the first state if the difference between the actual time stamp and the approximate time stamp is larger than the threshold value.
    Type: Grant
    Filed: November 23, 2012
    Date of Patent: September 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-Dong Shim, Won-Moon Cheon, Jae-Hoon Heo
  • Publication number: 20140379970
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: September 8, 2014
    Publication date: December 25, 2014
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 8904090
    Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Patent number: 8843699
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: September 23, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi
  • Patent number: 8694865
    Abstract: A method is provided for performing a write operation in a data storage device comprising a storage medium, a processing unit, and a buffer memory storing data to be transferred to the storage medium under control of the processing unit. The method comprises aggregating data in the buffer memory as a strip group comprising multiple data strips, transferring data strips in at least one strip group to the storage medium, calculating a parity strip based on the transferred data strips of the at least one strip group without additional access to the buffer memory, and transferring the parity strip to the storage medium.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: April 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Publication number: 20130179629
    Abstract: A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.
    Type: Application
    Filed: January 9, 2013
    Publication date: July 11, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Gyu-Dong SHIM, Won-Moon CHEON, Min-Wook JUNG
  • Publication number: 20130173857
    Abstract: In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
    Type: Application
    Filed: February 26, 2013
    Publication date: July 4, 2013
    Inventors: Won-Moon Cheon, Seon-Taek Kim, Chan-Ik Park, Sung-up Choi