Abstract: A method for cleaning a tube-shaped chamber after performing at least one deposition process includes equipping a tube-shaped cleaner into a loading chamber, loading the tube-shaped cleaner into the tube-shaped chamber and injecting a cleaning gas, and cleaning the tube-shaped chamber using the tube-shaped cleaner.

Abstract: A chamber cleaner includes a cleaner, which is sealed, a connector passing through a side of the cleaner, lamp assembly connected to the connector and uniformly arranged in an inside surface of the cleaner, a heat-source assembled in the lamp assembly and an exhausting unit having an entrance passing through a portion of the outside of the connector exposed to the cleaner, and an exit passing through a portion of the inside of the connector, which is extended to the outside of the exposed portion or a predetermined length.

Abstract: A chamber cleaner includes a cleaner, which is sealed, a connector passing through a side of the cleaner, lamp assembly connected to the connector and uniformly arranged in an inside surface of the cleaner, a heat-source assembled in the lamp assembly and an exhausting unit having an entrance passing through a portion of the outside of the connector exposed to the cleaner, and an exit passing through a portion of the inside of the connector, which is extended to the outside of the exposed portion or a predetermined length.

Abstract: A chamber cleaner includes a cleaner, which is sealed, a connector passing through a side of the cleaner, lamp assembly connected to the connector and uniformly arranged in an inside surface of the cleaner, a heat-source assembled in the lamp assembly and an exhausting unit having an entrance passing through a portion of the outside of the connector exposed to the cleaner, and an exit passing through a portion of the inside of the connector, which is extended to the outside of the exposed portion or a predetermined length.

Abstract: A method of manufacturing a semiconductor device comprising the steps of: forming an insulating layer on a silicon substrate; forming a contact hole on the insulating layer; forming a nitride layer on the side of the contact hole; and forming a selective conductive plug in the contact hole including the nitride layer.

Abstract: A chamber cleaner includes a cleaner, which is sealed, a connector passing through a side of the cleaner, lamp assembly connected to the connector and uniformly arranged in an inside surface of the cleaner, a heat-source assembled in the lamp assembly and an exhausting unit having an entrance passing through a portion of the outside of the connector exposed to the cleaner, and an exit passing through a portion of the inside of the connector, which is extended to the outside of the exposed portion or a predetermined length.

Abstract: The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing an increase of contact resistance even if the contact size becomes smaller and degradation of a step coverage property and of suppressing a decrease of uniformity in the contact resistance. The inventive method includes the steps of: a method for forming a contact plug in a semiconductor device, comprising the steps of: forming a contact hole by etching an insulating layer on a substrate; forming a first silicon film with a first doping concentration on the substrate in the contact hole so that the contact hole is partially filled; flushing a doping gas on a surface of the first silicon film; and forming a second silicon film having a second doping concentration higher than the first doping concentration on the first silicon film until filling the contact hole.

Abstract: A method of manufacturing a semiconductor device comprising the steps of forming an insulating layer on a silicon substrate, forming a contact hole on the insulating layer, forming a silicon layer on the surface of the contact hole, and forming a selective conductive plug in the contact hole having the silicon layer.

Abstract: Disclosed is a mask for evaluating selective epitaxial growth process. The disclosed mask comprises a mask pattern for resistance measurement to measure sheet resistance of grown single crystal silicon in a first area, a mask pattern for selectivity evaluation to evaluate selectivity of single crystal silicon growth in a second area diagonal to the first area, mask patterns for facet generation evaluation, having different shapes, to evaluate facet generation of grown single crystal silicon in a third area, mask patterns for loading effect evaluation, having different shapes, to evaluate growth of single crystal silicon by loading effect in the upper part of a fourth area and a mask pattern for uniformity evaluation to evaluate uniformity of grown single crystal silicon in the lower part of the pattern for loading effect evaluation in the fourth area.

Abstract: The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing an increase of contact resistance even if the contact size becomes smaller and degradation of a step coverage property and of suppressing a decrease of uniformity in the contact resistance. The inventive method includes the steps of: a method for forming a contact plug in a semiconductor device, comprising the steps of: forming a contact hole by etching an insulating layer on a substrate; forming a first silicon film with a first doping concentration on the substrate in the contact hole so that the contact hole is partially filled; flushing a doping gas on a surface of the first silicon film; and forming a second silicon film having a second doping concentration higher than the first doping concentration on the first silicon film until filling the contact hole.

Abstract: The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing a decrease of contact resistance and degradation of device properties due to external diffusions of boron. There suggested two different approaches to suppress regenerations of a native oxide layer so to minimize the contact resistance and to suppress the external diffusions of boron. The first approach includes the steps of forming a contact hole by etching an insulating (BPSG) layer containing boron and phosphorus and subsequently cleaning with a hydrogen-rapid thermal process (H2-RTP) as flowing PH3 gas containing phosphorus. Another approach includes the step of cleaning with the H2-RTP and simultaneously flowing HCl gas from a peak temperature of the H2-RTP.

Abstract: A method of fabricating a semiconductor device using a damascene metal gate including the steps of forming a damascene gate oxide layer and a damascene gate electrode on a semiconductor substrate, forming a trench at an upper part of the damascene gate electrode by selectively etching a portion of the damascene gate electrode to a predetermined thickness, forming an insulating layer in the trench on the damascene gate electrode, forming an insulating interlayer on an upper surface of the entire structure, and forming a contact hole exposing a portion of the semiconductor substrate by selectively etching the insulating interlayer.

Abstract: A method of forming a silicon-germanium (SiGe) film for a gate electrode. In a metal gate manufacture process, as the content of germanium (Ge) is increased, the surface roughness of the silicon-germanium (SiGe) film is increased, which makes difficult to secure an acceptable electrical characteristic as well as a set-up. In order to solve these problems, a method includes the spraying with a high density silicon micro-crystallite capable of increasing the nucleus creation efficiency on a gate oxide using a plasma or a tungsten (W) filament before depositing a silicon-germanium (SiGe) film. Thus, as micro-crystalline grains are formed during a preliminary stage of the silicon-germanium (SiGe) film deposition, a silicon-germanium (SiGe) film can be deposited with a reduced surface roughness.

Abstract: A chamber cleaner includes a cleaner, which is sealed, a connector passing through a side of the cleaner, lamp assembly connected to the connector and uniformly arranged in an inside surface of the cleaner, a heat-source assembled in the lamp assembly and an exhausting unit having an entrance passing through a portion of the outside of the connector exposed to the cleaner, and an exit passing through a portion of the inside of the connector, which is extended to the outside of the exposed portion or a predetermined length.

Abstract: A method of manufacturing a semiconductor device comprising the steps of: forming an insulating layer on a silicon substrate; forming a contact hole on the insulating layer; forming a nitride layer on the side of the contact hole; and forming a selective conductive plug in the contact hole including the nitride layer.

Abstract: A method for forming a contact plug of a semiconductor device having the steps of forming an insulating layer on a silicon substrate, forming a contact hole in the insulating layer, forming an inorganic layer on an inner sidewall surface of the contact hole, and forming a selective conductive plug in the contact hole, including over a surface of the inorganic layer.

Abstract: A method of manufacturing a semiconductor device comprising the steps of forming an insulating layer on a silicon substrate, forming a contact hole on the insulating layer, forming a silicon layer on the surface of the contact hole, and forming a selective conductive plug in the contact hole having the silicon layer.

Abstract: There is disclosed a method of manufacturing a contact plug in a semiconductor device using selective epitaxial growth of silicon (SEG) process. The method includes forming a nitride film at a predetermined in a semiconductor substrate region except for the region in which a contact plug will be formed, forming an USG film on the entire surface of the substrate in which the nitride film is formed by chemical enhanced vapor deposition method or a plasma method, etching the USG film by reactive ion etch method to expose the surface of silicon in the structure, and forming a contact plug by performing in-situ process while performing selective epitaxial growth method for the silicon film exposed through the contact hole in the structure.

Abstract: A method of optimizing a process of selective epitaxial growth sets a guideline for the reaction temperature, pressure, and gas ratio and calculates a non-equilibrium factor (NEF=[exp(l−(A/B))×C−D]×F×(1/S)) depending on the characteristic of the equipment and the types of source gases by controlling a super-saturation ratio depending on a basic thermodynamic law. The selective epitaxial growth by CVD is a deposition method by which a reactive product by thermal activation of a reactive gas is obtained in the shape of a thin film. Therefore, it can successfully form the selective epitaxial growth through control of the super-saturation ratio so that the selective epitaxial growth can be optimized. Also, the method can optimize the process by monitoring the quality of the thin film such as selectivity securing control of deposition speed, facet, reduction in deflects, etch depending on the pattern material.

Abstract: Disclosed is a mask for evaluating selective epitaxial growth process. The disclosed mask comprises a mask pattern for resistance measurement to measure sheet resistance of grown single crystal silicon in a first area, a mask pattern for selectivity evaluation to evaluate selectivity of single crystal silicon growth in a second area diagonal to the first area, mask patterns for facet generation evaluation, having different shapes, to evaluate facet generation of grown single crystal silicon in a third area, mask patterns for loading effect evaluation, having different shapes, to evaluate growth of single crystal silicon by loading effect in the upper part of a fourth area and a mask pattern for uniformity evaluation to evaluate uniformity of grown single crystal silicon in the lower part of the pattern for loading effect evaluation in the fourth area.