Abstract: A varifocal optical device is provided. The varifocal optical device includes an optical lens, an actuator unit connected with the optical lens and having two areas that are bending-deformed in opposite directions to each other when a voltage is applied thereto, and a supporting unit to support the actuator unit, so that a focus of the optical lens is varied by the bending deformation when the voltage is applied to the actuator unit. Thereby, a driving displacement of the varifocal optical lens can be maximized.

Abstract: An image forming element, a fabricating method of the image forming element, and an image forming apparatus having the image forming element is provided. The image forming element includes a drum body, a driving circuit mounted within the drum body, a support plate which penetrates through the drum body longitudinally along the drum body, the support plate being coupled to the driving circuit, an insulating layer formed on at least one portion of an outer circumference of the drum body, a conductive polymer layer formed on the insulating layer, the conductive polymer layer including one or more conductive areas and one or more insulating areas, which are aligned in an alternating pattern, and a protective layer formed on the conductive polymer layer, wherein the conductive areas on the conductive polymer layer are electrically connected to the driving circuit.

Abstract: A bulk acoustic resonance and a method for fabricating the bulk acoustic resonator, the bulk acoustic resonator including: a substrate including an upper surface defining a predetermined area including a cavity; a resonance part positioned above the cavity and including a surface comprising a dimple; and an anchor part connecting the resonance part to the substrate. The resonance part includes: a lower electrode including a lower surface including a predetermined dimpled area and an upper surface opposite to the predetermined dimpled area; a piezoelectric layer stacked on the upper surface of the lower electrode; and an upper electrode stacked on the piezoelectric layer. Because direction of the vibration of the resonator is adjustable by adjusting position, area, and the number of the dimples, process freedom can be improved.

Abstract: An electroactive polymer actuator and a method for manufacturing the electroactive polymer actuator are provided. The electroactive polymer actuator includes an actuator unit which is a laminate of a plurality of deformation layers; and a support layer which supports the actuator unit so that the actuator unit provides displacement corresponding to a voltage if the voltage is applied to the actuator unit. Therefore, it is possible to provide an electroactive polymer actuator suitable for a compact mobile device with a low driving voltage.

Abstract: A fabrication method of a packaging substrate includes the steps of: forming a recess by etching a predetermined area of a lower surface of a substrate; depositing a seed layer on an upper surface of the substrate; in the recess, etching predetermined area(s) of the lower surface of the substrate and forming at least one via hole that reaches the seed layer; and plating the inside of the via hole by using the seed layer, and forming electrode(s) for electrically coupling the upper and lower parts of the substrate. First and second pads coupled to the electrode(s) may be formed on the upper and lower parts of the substrate, respectively. Thus, using the second pads as bonding materials, the packaging process becomes easier, which resultantly simplifies the fabrication process of the packaging substrate and the packaging process.

Abstract: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection grooves with a metal material, forming cap pads on a top surface of the wafer to be electrically connected to the connection parts, bonding a supporting film with the top surface of the wafer on which the cap pads are formed, forming a cavity on a bottom surface of the wafer to expose the connection parts through the cavity, and forming metal lines on the bottom surface of the wafer to be electrically connected to the connection parts.

Abstract: A silicon direct bonding (SDB) method by which void formation caused by gases is suppressed. The SDB method includes: preparing two silicon substrates having corresponding bonding surfaces; forming trenches having a predetermined depth in at least one bonding surface of the two silicon substrates; forming gas discharge outlets connected to the trenches on at least one of the two silicon substrates to vertically penetrate the bonding surface; cleaning the two silicon substrates; closely contacting the two silicon substrates to each other; and thermally treating the two substrates to bond them to each other. The trenches are formed along at least a part of a plurality of dicing lines, and both ends of the trenches are clogged. Gases generated during a thermal treatment process can be smoothly and easily discharged through the trenches and the gas discharge outlet such that a void is prevented from being formed in the junctions of the two silicon substrates due to the gases.

Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.

Abstract: An inductor is provided which includes a plurality of via holes vertically passing through a substrate, the substrate having insulating properties, vertical conductive portions filling the via holes, and horizontal conductive portions connecting each individual vertical conductive portions at the top and the bottom of the substrate to form a single coil structure with the vertical conductive portions.

Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.

Abstract: A packaging chip in which a circuit module is packaged and a method of packaging a circuit module are provided. The packaging chip includes a base wafer; a circuit module on the base wafer; a packaging wafer having a cavity and combined with the base wafer so that the circuit module fits inside the cavity; a connecting electrode connecting upper and lower surfaces of the cavity; and a seed layer between the connecting electrode and the packaging wafer. The method includes etching a lower surface of the packaging wafer to form a cavity, stacking a metal layer in an area of the lower surface, combining the base wafer with the packaging wafer, polishing the packaging wafer, forming a viahole through the packaging wafer, stacking a seed layer on the packaging wafer, plating the inside of the viahole, removing the seed layer and forming an electrode.

Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.

Abstract: An optical lens is provided. The optical lens provides miniaturization and thin size, and reduces the cost and improves productivity by simplifying the structure and manufacturing process. The optical lens includes a light-transmitting substrate with a lens chamber and a fluidic chamber that are connected with each other. The optical lens also includes a light-transmitting elastic film which seals the lens chamber, a buffer elastic film which seals the fluidic chamber, and an actuator on the buffer elastic film which corresponds to the fluidic chamber, and varies the volume of the fluidic chamber to vary a pressure acting on the light-transmitting elastic film.

Abstract: A tunable capacitor using an electrowetting phenomenon includes a first electrode; a second electrode which is spaced apart from the first electrode and faces the first electrode; a fluidic channel which is disposed between the first electrode and the second electrode; a first insulating layer which is disposed between the first electrode and the fluidic channel; and a conductive fluid which is disposed in the fluidic channel and moves along the fluidic channel when a direct current (DC) potential difference occurs between the first and second electrodes. Accordingly, it is possible to fabricate the tunable capacitor with the simplified fabrication process, good reliability and durability, and no restriction on the tuning range.

Abstract: A cap wafer, fabrication method, and a semiconductor chip are provided. The cap wafer includes a cap wafer substrate; a penetrated electrode formed to penetrate the cap wafer substrate; and an electrode pad connected with a lower portion of the penetrated electrode on a lower surface of the cap wafer substrate, wherein the penetrated electrode has an oblique section which gradually widens from an upper surface to the lower surface of the cap wafer substrate. The fabrication method includes forming an oblique-via hole on a lower surface of a cap wafer substrate, the oblique-via hole having an oblique section which gradually narrows in a direction moving away from the lower surface of the cap wafer substrate; and forming a penetrated electrode in the oblique-via hole. The semiconductor chip includes a base wafer; a cap wafer; a cavity; a penetrated electrode; and a pad bonding layer.

Abstract: A multi stack packaging chip and a method of manufacturing the chip are provided. The method includes forming at least one second circuit element on a first wafer; forming a second wafer having a cavity and a one third circuit element formed opposite to the cavity; forming a solder on the second wafer; and combining the second wafer with the first wafer so that the second circuit element and the cavity correspond. The chip includes a flip-chip packaged chip in which a first circuit element is packaged using a first wafer; a second circuit element formed on the first wafer; a second wafer having a cavity and combined with the first wafer so that the cavity and the second circuit element correspond; a third circuit element formed on the second wafer; and a solder formed on the second wafer, the solder electrically coupling the second wafer to a packaging substrate.

Abstract: An image pickup device comprises: a sensor substrate having image sensors arranged in its image pickup region in the form of a matrix; an interlayer insulating film layer formed below a bottom of the sensor substrate, the interlayer insulating film layer including wiring layers formed therein to construct an electric circuit, the wiring layer being electrically connected with the image sensors; a support substrate attached on a bottom of the interlayer insulating film layer, the support substrate having contact electrodes formed in via holes; a lens layer formed over the top surface of the sensor substrate to be opposite to the interlayer insulating film layer; and a light-transmitting member formed over the lens layer.

Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.

Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.

Abstract: A micro-element package module which can reduce manufacturing costs and can be advantageous for mass production due to simplifying its structure and manufacturing process, and also can facilitate miniaturization and promote thinness, and a method of manufacturing the micro-element package module. The micro-element package module includes: an element substrate having a micro-element on a top surface of the element substrate; a circuit substrate that is provided around the element substrate; and an element housing that is provided above the element substrate and the circuit substrate, and includes a connecting section for electrically connecting the micro-element and the circuit substrate.