Abstract: A semiconductor device includes a lower structure and an upper structure on the lower structure. The lower structure includes a first semiconductor substrate, a first pad and a first dielectric layer. The first dielectric layer surrounds the first pad and exposes a top surface of the first pad. The upper structure includes a second semiconductor substrate, a second pad and a second dielectric layer. The second dielectric layer surrounds the second pad and exposes a bottom surface of the second pad. The first pad and the second pad are bonded to each other across an interfacial layer to couple the upper and lower structures to each other. The first and second pads and the interfacial layer include a same metallic material. The first and second pads have a substantially same average grain size and the interfacial layer has a different average grain size than the first and second pads.

Abstract: A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

Abstract: A fan-out semiconductor package includes a frame comprising a plurality of wiring layers electrically connected to one another, and having a recessed portion having a stopper layer 112aM disposed on a bottom surface of the recessed portion, and a through-hole penetrating through the stopper layer; a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and disposed in the recessed portion such that the inactive surface opposes the stopper layer; an encapsulant covering at least portions of the frame and the inactive surface of the semiconductor chip, and filling at least a portion of the recessed portion; and an interconnect structure disposed on the frame and the active surface of the semiconductor chip, and comprising a redistribution layer electrically connected to the plurality of wiring layers and the connection pad.

Abstract: A semiconductor package includes a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface, an encapsulant encapsulating at least a portion of the semiconductor chip, and a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer and a via electrically connected to the connection pads of the semiconductor chip, wherein at least a portion of the redistribution layer and the via is formed of a metal layer having a concave portion depressed from a lower surface thereof and filled with an insulating material.

Abstract: A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

Abstract: A fan-out semiconductor package includes a frame comprising a plurality of wiring layers electrically connected to one another, and having a recessed portion having a stopper layer 112aM disposed on a bottom surface of the recessed portion, and a through-hole penetrating through the stopper layer; a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and disposed in the recessed portion such that the inactive surface opposes the stopper layer; an encapsulant covering at least portions of the frame and the inactive surface of the semiconductor chip, and filling at least a portion of the recessed portion; and an interconnect structure disposed on the frame and the active surface of the semiconductor chip, and comprising a redistribution layer electrically connected to the plurality of wiring layers and the connection pad.

Abstract: An electromagnetic interference shielding structure includes a base layer and an electromagnetic interference shielding layer disposed on the base layer. The electromagnetic shielding layer includes a plurality of porous conductor layers, each of the porous conductor layers has a plurality of openings, and the porous conductor layers are stacked on each other in a stacking direction. A semiconductor package includes the electromagnetic interference shielding structure.

Abstract: A semiconductor package includes a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface, an encapsulant encapsulating at least a portion of the semiconductor chip, and a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer and a via electrically connected to the connection pads of the semiconductor chip, wherein at least a portion of the redistribution layer and the via is formed of a metal layer having a concave portion depressed from a lower surface thereof and filled with an insulating material.

Abstract: A fingerprint sensor includes a first conductive pattern formed on one side of a core, a second conductive pattern formed on the first conductive pattern, an insulating layer formed between the first conductive pattern and the second conductive pattern, a dielectric layer configured to cover the second conductive pattern, and a protective layer covering the dielectric layer, wherein the protective layer includes a photosetting resin.

Abstract: A fingerprint sensor includes a first conductive pattern formed on one side of a core, a second conductive pattern formed on the first conductive pattern, an insulating layer formed between the first conductive pattern and the second conductive pattern, a dielectric layer configured to cover the second conductive pattern, and a protective layer covering the dielectric layer, wherein the protective layer includes a photosetting resin

Abstract: A touch sensor includes a transparent substrate, and an electrode pattern formed on the transparent substrate. The electrode pattern is formed by stacking at least two or more electrode layers, thereby enhancing the anti-corrosion and visibility of electrode patterns and ensuring the adhesive reliability of the transparent substrate and the electrode patterns.

Abstract: The present invention relates to a piezoelectric device of a multi-layered structure on which first electrodes and second electrodes are sequentially stacked on a piezoelectric polymer and single surfaces or both surfaces of piezoelectric polymer. In accordance with the present invention, the vibration response characteristics of the piezoelectric polymer can be improved by using the graphene or the composite thereof as a surface electrode material to the piezoelectric polymer; and, there are effects that the response characteristics of the piezoelectric device are excellent and the reliability thereof is excellent by forming a second electrode having an excellent conductivity and a protection electrode thereof.

Abstract: Disclosed herein are a method for manufacturing a graphene transparent electrode and a graphene transparent electrode manufactured by the method. The method includes: providing a graphene oxide solution: forming a metal thin film on a glass substrate; coating the graphene oxide solution on the metal thin film, followed by drying; primarily reducing the thus obtained graphene oxide by using a reducing agent, to obtain reduced graphene oxide; secondarily reducing the reduced graphene oxide by heat treatment under the inert atmosphere, to form a reduced layer; compressing a transparent film on the reduced layer; and etching the metal film by an etching solution. The method enables a graphene transparent electrode having economical feasibility and excellent electric conductivity to be manufactured.

Abstract: A touch sensor includes a transparent substrate, and an electrode pattern formed on the transparent substrate. The electrode pattern is formed by stacking at least two or more electrode layers, thereby enhancing the anti-corrosion and visibility of electrode patterns and ensuring the adhesive reliability of the transparent substrate and the electrode patterns.

Abstract: Disclosed herein is a mutual capacitive touch panel, including: a first transparent substrate; a first bar-shaped transparent electrode formed on the first transparent substrate and divided in a length direction; first wiring whose one set of ends are connected to the first bar-shaped transparent electrode and whose the other set of ends are arranged on one side of the first transparent substrate; a second transparent substrate; a second bar-shaped transparent electrode formed on the second transparent substrate and divided in a length direction; second wiring whose one set of ends are connected to the second bar-shaped to transparent electrode and whose the other set of ends are arranged on one side of the second transparent substrate; and an adhesive layer disposed between the first bar-shaped transparent electrode and the second bar-shaped transparent electrode such that the first bar-shaped transparent electrode and the second bar-shaped transparent electrode face each other.

Abstract: Disclosed herein is a touch panel 100 including: bar type transparent electrodes 120 that are formed on a transparent substrate 110, bar type opening parts 130 that are formed in the bar type transparent electrodes 120 so as to be surrounded by the bar type transparent electrodes 120, and wirings 140 of which one ends are connected to the bar type transparent electrodes 120 and the other ends are collected at one side of the transparent substrate 110. The touch panel 100 includes the bar type transparent electrodes 120 in which the bar type opening parts 130 are formed and subdivides the transparent electrodes, thereby making it possible to improve touch sensitivity without increasing the wirings 140 and improve transparency.

Abstract: Disclosed herein is a touch panel. A touch panel according to a first preferred embodiment of the present invention includes: a base member; a transparent electrode formed in an active area of the base member; an insulator formed in a bezel area of the base member, and convexly protruded from the base member; and an electrode wiring formed on an exposed surface of the insulator. In addition, a touch panel according to a second preferred embodiment of the present invention includes: a base member having a groove portion formed such that an exposed surface thereof has a concave curved surface; a transparent electrode formed in an active area; and an electrode wire connected to one end or both ends of the transparent electrode and formed on the exposed surface of the groove portion.

Abstract: A transparent electrode includes: a substrate, a first electrode layer formed on the substrate, and a graphene oxide layer formed on and/or under the first electrode layer, and an electronic material for same. The transparent electrode includes graphene oxide layers on and under a conductor and/or a semiconductor to maintain a resistance measured on a surface of a graphene oxide layer in a transparent electrode including the graphene oxide layer almost equal to a resistance of a conductor and/or a semiconductor while showing characteristics of an insulator between conductors or semiconductors or between a conductor and a semiconductor which are separated from each other. Further, the graphene oxide layer performs a role of a barrier layer to protect the transparent electrode, thus preventing deterioration of characteristics of the transparent electrode and improving long-term reliability and transmittance.

Abstract: Disclosed herein is a mutual capacitive touch panel, including: a first transparent substrate; a first bar-shaped transparent electrode formed on the first transparent substrate and divided in a length direction; first wiring whose one set of ends are connected to the first bar-shaped transparent electrode and whose the other set of ends are arranged on one side of the first transparent substrate; a second transparent substrate; a second bar-shaped transparent electrode formed on the second transparent substrate and divided in a length direction; second wiring whose one set of ends are connected to the second bar-shaped to transparent electrode and whose the other set of ends are arranged on one side of the second transparent substrate; and an adhesive layer disposed between the first bar-shaped transparent electrode and the second bar-shaped transparent electrode such that the first bar-shaped transparent electrode and the second bar-shaped transparent electrode face each other.

Abstract: Disclosed herein are a touch screen and a method of manufacturing the same. The touch screen includes: a transparent substrate; a transparent electrode formed on the transparent substrate and including a sensing part sensing a touch input and an extension part extending from the sensing part to an edge of the transparent substrate; a wiring electrode formed at the edge of the transparent substrate and spaced apart from the extension part of the transparent electrode; and a conductive paste formed at the edge of the transparent substrate and covering both the extension part and the wiring electrode so as to electrically connect the transparent electrode to the wiring electrode, whereby the transparent electrode is formed after the wiring electrode is formed and the wiring electrode is connected to the transparent electrode through the conductive paste, thereby preventing the transparent electrode from being damaged.