Abstract: Among other things, systems and techniques are provided for detecting defects on a wafer based upon non-correctable error data yielded from a scan of the wafer to determine a topology of the wafer. The non-correctable error data is reconstructed to generate a non-correctable error image map, which is transformed to generate a projection. In some embodiments, the non-correctable error image map is transformed via a feature extraction transform such as a Hough transform or a Radon transform. In some embodiments, the projection is compared to a set of rules to identify a signature in the non-correctable error image map indicative of a defect.

Abstract: A method for correcting pixel information of color pixels on a color filter array of an image sensor includes: establishing an M×M distance factor table, selecting M×M pixels of the color filter array, calculating a red/green/blue-color contribution from the red/green/blue pixels to a target pixel in the selected M×M pixels, calculating a red/blue/green-color pixel performance of the target pixel, calculating a red/blue/green-color correcting factor, obtaining a corrected pixel information of each of the red/green/blue pixels, by applying the red/green/blue-color correcting factor to the measured pixel information of each of the red/green/blue pixels.

Abstract: Catalytic cracking catalyst compositions and processes for cracking hydrocarbons to maximize light olefins production are disclosed. Catalyst compositions comprise at least one zeolite having catalytic cracking activity under catalytic cracking conditions, preferably Y-type zeolite, which zeolite has low amounts of yttrium in specified ratios to rare earth metals exchanged on the zeolite. Catalyst and processes of the invention provide increased yields of light olefins and gasoline olefins during a FCC process as compared to conventional lanthanum containing Y-type zeolite FCC catalysts.

Abstract: The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.

Abstract: A method for correcting pixel information of color pixels on a color filter array of an image sensor includes: establishing an M×M distance factor table, selecting M×M pixels of the color filter array, calculating a red/green/blue-color contribution from the red/green/blue pixels to a target pixel in the selected M×M pixels, calculating a red/blue/green-color pixel performance of the target pixel, calculating a red/blue/green-color correcting factor, obtaining a corrected pixel information of each of the red/green/blue pixels, by applying the red/green/blue-color correcting factor to the measured pixel information of each of the red/green/blue pixels.

Abstract: The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.

Abstract: A particulate catalytic cracking catalyst which comprises a zeolite having catalytic cracking ability under catalytic cracking conditions, added silica, precipitated alumina and, optionally clay. The catalytic cracking catalyst has a high matrix surface area and is useful in a catalytic cracking process, in particularly, a fluid catalytic cracking process, to improve bottoms conversion at a constant coke formation.

Abstract: Particulate catalytic cracking catalysts which comprise a zeolite having catalytic cracking ability under catalytic cracking conditions, added silica, a magnesium salt, an alumina containing binder, clay and optionally, a matrix material. The catalytic cracking catalyst has a high matrix surface area and is useful in a catalytic cracking process, in particularly, a fluid catalytic cracking process, to provide increased catalytic activity and improved coke and hydrogen selectivity without the need to incorporate rare earth metals.

Abstract: A rare earth free particulate catalytic cracking catalyst which comprises a zeolite having catalytic cracking ability under catalytic cracking conditions, an acidified silica sol binder, magnesium salt, clay and a matrix material. The catalytic cracking catalyst has a high matrix surface area and is useful in a catalytic cracking process, in particularly, a fluid catalytic cracking process, to provide increased catalytic activity and improved hydrogen and coke selectivity without the need to incorporate rare earth metals.

Abstract: This invention relates to a process of preparing a catalyst from zeolite having a relatively high content of sodium of 18.6 ?g Na2O per zeolite surface area, or greater. The invention comprises adding yttrium compound to the zeolite, either prior to, during, or after its combination with precursors for catalyst matrix. This invention is suitable for preparing zeolite containing fluid cracking catalysts.

Abstract: A light-emitting diode package is provided. The light-emitting diode package comprises a substrate and a first metal layer disposed over the substrate. A solder layer is disposed on the first metal layer and a light-emitting diode chip is disposed on the solder layer, wherein the light-emitting diode chip comprises a conductive substrate and a multilayered epitaxial structure formed on the conductive substrate, and wherein the conductive substrate is adjacent to the solder layer.

Abstract: A crate is provided with a base, sides, front, and back that form an enclosure. The front includes and opening and a door positioned within the opening in the closed position. The door is hung by hinges, which are associated with uninterrupted rails on the top of the crate. To open the crate, the bottom of the door is swung outward and upward to pivot the door toward the horizontal position on the hinges. Then, the door can be slid into the enclosure along the uninterrupted guides. The door may also include locks that can secure the door in the closed position. Both of the sides or both the front and back can be releasably connected with the top and pivotable into the base. After both sides or both the front and back are pivoted into the base, the remaining walls and top can be pivoted to fold into the base as a unit.

Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a substrate and a chip disposed over the substrate. A solder layer is disposed between the chip and the substrate. A conductive pad is disposed between the solder layer and the substrate, wherein the conductive pad includes a first portion disposed under the solder layer, a second portion disposed away from the first portion and a connective portion disposed between the first portion and the second portion. The connective portion has a width which is narrower than a width of the first portion along a first direction perpendicular to a second direction extending from the first portion to the connective portion.

Abstract: This invention relates to a process of preparing a catalyst from zeolite and peptized alumina. The invention comprises adding a yttrium compound to the zeolite, either prior to, during, or after its combination with the peptized alumina. The yttrium compound can be added to the zeolite via exchange of yttrium onto the zeolite prior to addition of peptized alumina, or the yttrium can be added as a soluble salt during the combination of the zeolite and peptized alumina. In either embodiment, the zeolite catalyst is then formed from the zeolite, yttrium and peptized alumina, optionally containing other inorganic oxide. This invention is suitable for preparing fluid cracking catalysts.

Abstract: Catalytic cracking catalyst compositions and processes for cracking hydrocarbons to maximize light olefins production are disclosed. Catalyst compositions comprise at least one zeolite having catalytic cracking activity under catalytic cracking conditions, preferably Y-type zeolite, which zeolite has low amounts of yttrium in specified ratios to rare earth metals exchanged on the zeolite. Catalyst and processes of the invention provide increased yields of light olefins and gasoline olefins during a FCC process as compared to conventional lanthanum containing Y-type zeolite FCC catalysts.

Abstract: This invention relates to a process of preparing an improved catalyst comprising a clay derived zeolite. In particular, the invention comprises combining an yttrium compound with a zeolite produced by treating clay with a silica source and under alkaline conditions. The clay derived zeolite can be further combined with conventional matrix and/or binder precursors to form particulates suitable for use as catalysts in fluid catalytic cracking (FCC). Alternatively, the clay that is treated with the silica source and alkaline conditions can be in particulate form having sizes suitable for use in FCC, and the zeolite is produced in situ within the particulate. Yttrium compound is then combined with the zeolite in the particulate, e.g., via impregnation. It has been shown that the addition of the yttrium compound improves zeolite surface area retention, and zeolite stability in catalysts comprising clay derived zeolites.

Abstract: The invention provides a light emitting semiconductor structure, which includes a substrate; a first LED chip formed on the substrate; an adhesion layer formed on the first LED chip; and a second light emitting diode chip formed on the adhesion layer, wherein the second LED chip has a first conductive wire which is electrically connected to the substrate.

Abstract: Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die, wherein the luminescent material layer has at least one opening corresponding to and exposing the at least one bond pad. At least one wirebond is electrically connected to the at least one bond pad and a contact pad on the substrate.

Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a substrate and a chip disposed over the substrate. A solder layer is disposed between the chip and the substrate. A conductive pad is disposed between the solder layer and the substrate, wherein the conductive pad includes a first portion disposed under the solder layer, a second portion disposed away from the first portion and a connective portion disposed between the first portion and the second portion. The connective portion has a width which is narrower than a width of the first portion along a first direction perpendicular to a second direction extending from the first portion to the connective portion.