Patents by Inventor Wu Hu Li
Wu Hu Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220310465Abstract: A power semiconductor module includes a substrate of planar sheet metal including a plurality of islands that are each defined by channels that extend between upper and lower surfaces of the substrate, a first semiconductor die mounted on a first one of the islands, a molded body of encapsulant that covers the metal substrate, fills the channels, and encapsulates the first semiconductor die, a hole in the molded body that extends to a recess in the upper surface of the substrate, and a press-fit connector arranged in the hole such an interior end of the press-fit connector is mechanically and electrically connected to the substrate.Type: ApplicationFiled: June 16, 2022Publication date: September 29, 2022Inventors: Wu Hu Li, Raphael Hellwig, Olaf Hohlfeld, Martin Mayer, Ivan Nikitin
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Patent number: 11450642Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: December 23, 2020Date of Patent: September 20, 2022Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 11404336Abstract: A method of forming a power semiconductor module includes providing a substrate of planar sheet metal, forming channels in an upper surface of the substrate that partially extend through a thickness of the substrate and define a plurality of islands in the substrate, mounting a first semiconductor die on a first one of the islands, forming a molded body of encapsulant that covers the substrate, fills the channels, and encapsulates the semiconductor die, forming a hole in the molded body and a recess in the upper surface of the substrate beneath the hole, and arranging a press-fit connector in the hole and forming a mechanical and electrical connection between an interior end of the press-fit connector and the substrate.Type: GrantFiled: June 29, 2020Date of Patent: August 2, 2022Assignee: Infineon Technologies Austria AGInventors: Wu Hu Li, Raphael Hellwig, Olaf Hohlfeld, Martin Mayer, Ivan Nikitin
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Publication number: 20210407873Abstract: A method of forming a power semiconductor module includes providing a substrate of planar sheet metal, forming channels in an upper surface of the substrate that partially extend through a thickness of the substrate and define a plurality of islands in the substrate, mounting a first semiconductor die on a first one of the islands, forming a molded body of encapsulant that covers the substrate, fills the channels, and encapsulates the semiconductor die, forming a hole in the molded body and a recess in the upper surface of the substrate beneath the hole, and arranging a press-fit connector in the hole and forming a mechanical and electrical connection between an interior end of the press-fit connector and the substrate.Type: ApplicationFiled: June 29, 2020Publication date: December 30, 2021Inventors: Wu Hu Li, Raphael Hellwig, Olaf Hohlfeld, Martin Mayer, Ivan Nikitin
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Publication number: 20210118843Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: December 23, 2020Publication date: April 22, 2021Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10896893Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: March 16, 2020Date of Patent: January 19, 2021Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10892247Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: March 16, 2020Date of Patent: January 12, 2021Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20200381314Abstract: A method for providing coated leadframes in a process line includes: feeding a plurality of leadframes successively into a process line; depositing a layer onto a main face of the leadframes; measuring physical properties of the layer by one of ellipsometry or reflectometry; assigning measured physical data to any one of a plurality of categories; and depending on a resulting category of the measured physical data, altering process parameters of the depositing, not altering the process parameters of the depositing, or shutting down the process line.Type: ApplicationFiled: May 27, 2020Publication date: December 3, 2020Inventors: Wu Hu Li, Stefan Schwab, Verena Muhr, Edmund Riedl, Alexander Roth, Harry Sax
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Publication number: 20200243480Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: March 16, 2020Publication date: July 30, 2020Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20200219841Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: March 16, 2020Publication date: July 9, 2020Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10615145Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: July 16, 2018Date of Patent: April 7, 2020Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10366946Abstract: A connection member for connecting an electronic chip, wherein the connection member comprises a bulk body, and a coating at least partially coating the bulk body and comprising a material having higher electric and higher thermal conductivity than the bulk body, wherein a ratio between a thickness of the coating and a thickness of the bulk body is at least 0.0016 at at least a part of the connection member.Type: GrantFiled: October 30, 2017Date of Patent: July 30, 2019Assignee: Infineon Technologies AGInventors: Wu Hu Li, Edmund Riedl, Thomas Horedt, Ali Mazloum-Nejadari
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Publication number: 20190131218Abstract: A connection member for connecting an electronic chip, wherein the connection member comprises a bulk body, and a coating at least partially coating the bulk body and comprising a material having higher electric and higher thermal conductivity than the bulk body, wherein a ratio between a thickness of the coating and a thickness of the bulk body is at least 0.0016 at at least a part of the connection member.Type: ApplicationFiled: October 30, 2017Publication date: May 2, 2019Inventors: Wu Hu LI, Edmund RIEDL, Thomas HOREDT, Ali MAZLOUM-NEJADARI
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Publication number: 20190035764Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: July 16, 2018Publication date: January 31, 2019Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 8703544Abstract: An electronic component and method of making an electronic component is disclosed. In one embodiment, the electronic component includes a frame having a base layer, a first layer, a second layer including palladium placed on the first layer, and a third layer including gold placed on the second layer. A semiconductor chip is positioned on the frame.Type: GrantFiled: February 28, 2012Date of Patent: April 22, 2014Assignee: Infineon Technologies AGInventors: Wu Hu Li, Heng Wan Hong
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Publication number: 20120156832Abstract: An electronic component and method of making an electronic component is disclosed. In one embodiment, the electronic component includes a frame having a base layer, a first layer, a second layer including palladium placed on the first layer, and a third layer including gold placed on the second layer. A semiconductor chip is positioned on the frame.Type: ApplicationFiled: February 28, 2012Publication date: June 21, 2012Applicant: INFINEON TECHNOLOGIES AGInventors: Wu Hu Li, Heng Wan Hong
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Patent number: 8125060Abstract: An electronic component is disclosed. In one embodiment, the electronic component includes a frame having a base layer, a first layer, a second layer including palladium placed on the first layer, and a third layer including gold placed on the second layer. A semiconductor chip is positioned on the frame.Type: GrantFiled: December 8, 2006Date of Patent: February 28, 2012Assignee: Infineon Technologies AGInventors: Wu Hu Li, Heng Wan Hong
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Patent number: 7875968Abstract: Leadframe for a semiconductor package and manufacturing from such leadframe including a plurality of connection leads supported in a frame. Die mounting plate is centrally located in the leadframe and is supported by a plurality of support leads which are electrically connected to the die mounting pad and extending in a direction outwardly therefrom towards the frame. Each support lead is formed with a connection pad portion and a down set link portion. Each connection pad portion is spaced from the die mounting plate and is connected to a conductive bonding ground wire from a semiconductor device mounted on the die mounting plate. Each down set link portion is electrically connected to the die mounting pad and supports the die mounting pad in a spaced arrangement from the connection leads. The connection pad portion and the down set link portion overlap, in the direction of extension of the support lead.Type: GrantFiled: February 5, 2008Date of Patent: January 25, 2011Assignee: Infineon Technologies AGInventors: Wu Hu Li, Mohamad Yazid Wagiman, Min Wee Low
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Publication number: 20080135995Abstract: An electronic component is disclosed. In one embodiment, the electronic component includes a frame having a base layer, a first layer, a second layer including palladium placed on the first layer, and a third layer including gold placed on the second layer. A semiconductor chip is positioned on the frame.Type: ApplicationFiled: December 8, 2006Publication date: June 12, 2008Inventors: Wu Hu Li, Heng Wan Hong
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Publication number: 20080128741Abstract: A leadframe for a semiconductor package and a semiconductor package manufactured from such a leadframe including a plurality of connection leads supported in a frame. A die mounting plate is centrally located in the leadframe and is supported by a plurality of support leads with each support lead electrically connected to the die mounting pad and extending in a direction outwardly therefrom towards the frame. Each support lead is formed with a connection pad portion and a down set link portion. Each connection pad portion is spaced from the die mounting plate and is designed for connection to a conductive bonding ground wire from a semiconductor device mounted on the die mounting plate. Each down set link portion is electrically connected to the die mounting pad and is arranged to support the die mounting pad in a spaced arrangement from the connection leads. The connection pad portion and the down set link portion overlap, in the direction of extension of the support lead.Type: ApplicationFiled: February 5, 2008Publication date: June 5, 2008Inventors: Wu Hu Li, Mohamad Yazid Wagiman, Min Wee Low