Patents by Inventor Wu Wei

Wu Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12272592
    Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.
    Type: Grant
    Filed: May 15, 2024
    Date of Patent: April 8, 2025
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Kun-Huang Yu, Chien-Yu Chen, Ting-Wei Liao, Chih-Wen Hsiung, Chun-Lung Chang, Kuo-Chin Chiu, Wu-Te Weng, Chien-Wei Chiu, Yong-Zhong Hu, Ta-Yung Yang
  • Patent number: 12264059
    Abstract: A fluid material dispensing apparatus includes: a target nozzle for dispensing water to a target container; a water drainage port; a temperature adjustment device for adjusting a temperature of received water to produce a temperature-adjusted water; a flow direction control device coupled with target nozzle, the temperature adjustment device, and the water drainage port; and a control circuit. When the control circuit determines that a temperature of the temperature-adjusted water reaches a predetermined temperature, the control circuit controls the flow direction control device to guide the temperature-adjusted water to flow toward the target nozzle through the first output terminal, so that the target nozzle dispenses the temperature-adjusted water into the target container.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: April 1, 2025
    Assignee: Botrista, Inc.
    Inventors: Wu-Chou Kuo, Yu-Min Lee, Yu Wei Chen
  • Publication number: 20250104937
    Abstract: A button structure includes a switch, a shell, an elastic member, a button and at least one adjustable limiting member. The elastic member includes a fixing portion, a compressive portion and an elastic portion. The fixing portion is connected to the shell. The compressive portion is configured to abut against the switch. The elastic portion is connected between the fixing portion and the compressive portion. The elastic portion is suitable for deformation. The button is connected to the compressive portion, and the compressive portion is located between the button and the switch. The adjustable limiting member is disposed on the button, and is configured to abut against the elastic portion. The adjustable limiting member adjustably protrudes for a length toward the elastic portion relative to the button.
    Type: Application
    Filed: December 20, 2023
    Publication date: March 27, 2025
    Inventors: CHI-CHEN HUANG, Chiu-Lan HSU, Jien-Feng HUANG, Wu-Chang TSAI, Tzu-Chiang CHENG, Yi-Cheng HSIAO, I-Cheng HUNG, Cheng-Wei LEE, Ya-Ke YU, Ren-Mei TSENG
  • Patent number: 12252387
    Abstract: A fluid material dispensing apparatus include: a material output connector; a water output connector; a pump, arranged to operably extract a fluid material from a material container and to operably push the fluid material to flow toward the material output connector; a water input port, arranged to operably supply water to the water output connector; a temperature adjustment device, arranged to operably receive the fluid material passed through the material output connector and the water passed through the water output connector, so as to form a mixed material; a nozzle, coupled with the temperature adjustment device; and a control circuit, arranged to operably control the pump and the nozzle, and to operably control the temperature adjustment device to adjust a temperature of the mixed material to produce and output a temperature-adjusted material to the nozzle, so that the nozzle outputs the temperature-adjusted material to a target container.
    Type: Grant
    Filed: August 27, 2024
    Date of Patent: March 18, 2025
    Assignee: Botrista, Inc.
    Inventors: Wu-Chou Kuo, Yu-Min Lee, Yu Wei Chen
  • Patent number: 12246960
    Abstract: A material dispensing device includes: a target nozzle for dispensing a target material to a target container; a pump arranged to operably extract the target material from the material container and to operably push the target material to flow toward the target nozzle; a material drainage port; a flow direction switch device, coupled with the target nozzle and the material drainage port, and arranged to operably receive the target material; and a control circuit. When the material dispensing device needs to output the target material to the target container, if the control circuit determines that a quality of the target material inside the material dispensing device is acceptable, the control circuit controls the flow direction switch device to guide the target material to flow toward the target nozzle, so as to dispense the target material into the target container through the target nozzle.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: March 11, 2025
    Assignee: BOTRISTA, INC.
    Inventors: Wu-Chou Kuo, Yu-Min Lee, Yu Wei Chen
  • Publication number: 20250075441
    Abstract: A top-down construction type assembly construction method for paved road surface, including the following steps: step I, manufacturing prefabricating slabs: using a top-down method to manufacture the prefabricating slabs, and providing bolt sleeves, inside the prefabricating slabs, which are evenly arranged in the prefabricating slabs; step II, mounting the prefabricating slabs: on a lower bearing plate, placing the prefabricating slabs in one step, performing a fine tuning on a position and an altitude of the prefabricating slabs, performing a grouting construction, finally forming the paved road surface; the prefabricating slabs are manufactured by laying bricks and pouring concrete, the prefabricating slabs are rolled over and mounted, thus eliminating on-site concrete bonding between bricks and the lower bearing plate, improving overall stability of the bricks and the prefabricating slabs after being mounted, assembled mounting for a paved road surface is implemented, and the construction period is shorte
    Type: Application
    Filed: October 28, 2024
    Publication date: March 6, 2025
    Inventors: Jiesheng ZHANG, Yangjie JIANG, Fengchun DONG, Wu HUANG, Anhui WANG, Shengyun HE, Jingyi LI, Shijun PI, Lingjian KONG, Ning ZHAO, Zhuoyi WEI, Shuguo XU, Ying WANG, Can JIANG, Bo ZHANG
  • Patent number: 12245437
    Abstract: A semiconductor device includes a bottom electrode via, a top electrode via over the bottom electrode via, a memory cell between the bottom electrode via and the top electrode via, a first dielectric layer over the memory cell, and a second dielectric layer over the first dielectric layer, and a via structure separated from the memory cell. A height of the via structure is substantially equal to a sum of a height of the bottom electrode via, a height of the memory cell, and a height of the top electrode via. The first dielectric layer partially surrounds a first portion of the via structure, and the second dielectric layer partially surrounds a second portion of the via structure. A height of the second portion of the via structure is greater than a height of the first portion of the via structure.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Harry-Hak-Lay Chuang, Wu-Chang Tsai, Tien-Wei Chiang
  • Patent number: 12227405
    Abstract: A material dispensing device includes: a target nozzle for dispensing a target material to a target container; a pump arranged to operably extract the target material from the material container and to operably push the target material to flow toward the target nozzle; a material drainage port; a flow direction switch device, coupled with the target nozzle and the material drainage port, and arranged to operably receive the target material; and a control circuit. When the material dispensing device needs to output the target material to the target container, if the control circuit determines that a temperature of the target material inside the material dispensing device reaches a predetermined temperature, the control circuit controls the flow direction switch device to guide the target material to flow toward the target nozzle, so as to dispense the target material into the target container through the target nozzle.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: February 18, 2025
    Assignee: BOTRISTA, INC.
    Inventors: Wu-Chou Kuo, Yu-Min Lee, Yu Wei Chen
  • Patent number: 12227406
    Abstract: A fluid material dispensing apparatus include: a first nozzle; a second nozzle; a pump, arranged to operably extract a fluid material from the material container and to operably push the fluid material to flow toward the first nozzle; a material-temperature adjustment device, coupled with the first nozzle; a water-temperature adjustment device, coupled between a water input port and the second nozzle; and a control circuit for controlling the material-temperature adjustment device to adjust a temperature of the fluid material to produce and output a temperature-adjusted material to the first nozzle; wherein the control circuit also controls the water-temperature adjustment device to adjust a temperature of water transmitted from the water input port to produce and output a temperature-adjusted water to the second nozzle.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: February 18, 2025
    Assignee: BOTRISTA, INC.
    Inventors: Wu-Chou Kuo, Yu-Min Lee, Yu Wei Chen
  • Publication number: 20250056853
    Abstract: A junction field effect transistor device includes a substrate, a well region, a first top layer, a plurality of source/drain regions, a first isolation structure, a gate, and a plurality of first well slots. The substrate has a first conductivity type. The well region is embedded in the substrate. The well region has a second conductivity type. The first top layer is embedded in the well region. The first top layer has the first conductivity type. The source/drain regions are disposed on a top surface of the well region. The first isolation structure is adjacent to one of the source/drain regions. The gate is disposed on a top surface of the first top layer. The first well slots are disposed below the gate. A second-conductivity-type dopant concentration of the first well slots is lower than a second-conductivity-type dopant concentration of the well region.
    Type: Application
    Filed: September 25, 2023
    Publication date: February 13, 2025
    Inventors: Wen-Wei LAI, Wu-Te WENG
  • Patent number: 12224352
    Abstract: A thin film transistor includes a stack of an active layer, a gate dielectric, and a gate electrode in a forward or in a reverse order. The active layer includes a compound semiconductor material containing oxygen, at least one acceptor-type element selected from Ga and W, and at least one heavy post-transition metal element selected from In and Sn. An atomic percentage of the at least one heavy post-transition metal element at a first surface portion of the active layer that contacts the gate dielectric is higher than an atomic percentage of the at least one heavy post-transition metal element at a second surface portion of the active layer located on an opposite side of the gate dielectric. The front channel current may be increased, and the back channel leakage current may be decreased.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wu-Wei Tsai, Hai-Ching Chen, Po-Ting Lin
  • Patent number: 12199188
    Abstract: A stack including an active layer, a gate dielectric, and a gate electrode is formed in a forward or in a reverse order, over a substrate. The active layer includes a front channel layer, a bulk semiconductor layer, and a back channel layer. The front channel layer is formed by depositing a layer stack that include at least one post-transition metal oxide layer, a zinc oxide layer, and at least one acceptor-type oxide layer. The zinc oxide layer or at least one post transition metal oxide layer contacts the gate dielectric, and the at least one acceptor-type oxide layer is most distal from the gate dielectric. The front channel layer provides enhanced channel conductivity, while the back channel layer provides suppressed channel conductivity.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 14, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wu-Wei Tsai, Hai-Ching Chen, Sai-Hooi Yeong, Yu-Ming Lin
  • Publication number: 20240387710
    Abstract: A semiconductor device includes a first transistor. The first transistor includes a source region, a drain region, a semiconductive material layer, a gate dielectric film stack and a gate electrode. The semiconductive material layer is disposed between the source region and the drain region. The gate dielectric film stack is disposed on the semiconductive material layer and includes a first film layer, a second film layer and an intermediate film layer. The first film layer and the second film layer include hafnium. The intermediate layer is sandwiched in between the first film layer and the second film layer and includes hafnium, wherein a hafnium content of the intermediate film layer is lower than a hafnium content of the first film layer and a hafnium content of the second film layer. The gate electrode is disposed on the gate dielectric film stack.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Ting Lin, Wu-Wei Tsai, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240379872
    Abstract: A stack including an active layer, a gate dielectric, and a gate electrode is formed in a forward or in a reverse order, over a substrate. The active layer includes a front channel layer, a bulk semiconductor layer, and a back channel layer. The front channel layer is formed by depositing a layer stack that include at least one post-transition metal oxide layer, a zinc oxide layer, and at least one acceptor-type oxide layer. The zinc oxide layer or at least one post transition metal oxide layer contacts the gate dielectric, and the at least one acceptor-type oxide layer is most distal from the gate dielectric. The front channel layer provides enhanced channel conductivity, while the back channel layer provides suppressed channel conductivity.
    Type: Application
    Filed: July 21, 2024
    Publication date: November 14, 2024
    Inventors: Wu-Wei TSAI, Hai-Ching CHEN, Sai-Hooi YEONG, Yu-Ming LIN
  • Publication number: 20240379870
    Abstract: The problem of providing transistors that can be manufactured to any specified threshold voltage withing a broad range of threshold voltages without creating leakage, capacitance, or process compatibility issues is solved by introducing a buried layer of a second dielectric composition into a gate dielectric of a first dielectric composition. The second dielectric composition is selected relative to the first dielectric composition so that dipoles form around the interface of the two dielectrics. The dipoles create an electric field that causes a shift in the threshold voltage. The buried layer has a higher dielectric constant than the gate dielectric, is thinner than the gate dielectric, and is proximate the channel.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 14, 2024
    Inventors: Wu-Wei Tsai, Hai-Ching Chen, Po-Ting Lin, Yan-Yi Chen, Yu-Ming Lin, Chung-Te Lin, Tzer-Min Shen, Yen-Tien Tung
  • Publication number: 20240379858
    Abstract: In some embodiments, the present disclosure relates to a device. The device includes an active layer arranged over a substrate. A gate electrode is arranged on a first side of the active layer and spaced apart from the active layer by a gate dielectric layer. A passivation structure is arranged on the active layer. A source contact extends through the passivation structure to contact the active layer and a drain contact extends through the passivation structure to contact the active layer. An upper portion of the passivation structure includes silicon carbide.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Wu-Wei Tsai, Hai-Ching Chen
  • Publication number: 20240381659
    Abstract: A semiconductor memory structure includes a gate structure, a ferroelectric layer over the gate structure, a channel layer over the ferroelectric layer, an intervening structure between the ferroelectric layer and the channel layer, and a source structure and a drain structure separated from each other over the channel layer. A thickness of the intervening structure is less than a thickness of the channel layer and less than a thickness of the ferroelectric layer. The channel layer and the intervening structure include different materials.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 14, 2024
    Inventors: PO-TING LIN, CHUNG-TE LIN, HAI-CHING CHEN, YU-MING LIN, KUO-CHANG CHIANG, YAN-YI CHEN, WU-WEI TSAI, YU-CHUAN SHIH
  • Publication number: 20240379867
    Abstract: A thin film transistor includes a stack of an active layer, a gate dielectric, and a gate electrode in a forward or in a reverse order. The active layer includes a compound semiconductor material containing oxygen, at least one acceptor-type element selected from Ga and W, and at least one heavy post-transition metal element selected from In and Sn. An atomic percentage of the at least one heavy post-transition metal element at a first surface portion of the active layer that contacts the gate dielectric is higher than an atomic percentage of the at least one heavy post-transition metal element at a second surface portion of the active layer located on an opposite side of the gate dielectric. The front channel current may be increased, and the back channel leakage current may be decreased.
    Type: Application
    Filed: July 21, 2024
    Publication date: November 14, 2024
    Inventors: Wu-Wei Tsai, Hai-Ching Chen, Po-Ting Lin
  • Publication number: 20240363716
    Abstract: A thin film transistor may be manufactured by forming a gate electrode in an insulating layer over a substrate, forming a gate dielectric over the gate electrode and the insulating layer, forming an active layer over the gate electrode, and forming a source electrode and a drain electrode contacting a respective portion of a top surface of the active layer. A surface oxygen concentration may be increased in at least one of the gate dielectric and the active layer by introducing oxygen atoms into a surface region of a respective one of the gate dielectric and the active layer.
    Type: Application
    Filed: July 12, 2024
    Publication date: October 31, 2024
    Inventors: Wu-Wei TSAI, Chun-Chieh LU, Hai-Ching CHEN, Yu-Ming LIN, Sai-Hooi YEONG
  • Publication number: 20240355822
    Abstract: A semiconductor device includes a first transistor and a second transistor vertically stacked over the first transistor. The first transistor includes a semiconductor channel layer, a first gate structure wrapping around the semiconductor channel layer, and first source/drain structures on opposite ends of the semiconductor channel layer. The second transistor includes a metal oxide channel layer, a second gate structure wrapping around the metal oxide channel layer, and second source/drain structures on opposite ends of the metal oxide channel layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: October 24, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che Chi SHIH, Tsung-En LEE, Wu-Wei TSAI, Wei-Yen WOON, Szuya LIAO