Patents by Inventor Xiang Yin Zeng

Xiang Yin Zeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080158063
    Abstract: Electronic devices and methods for their formation are described. One device relates to an electronic assembly including a substrate having a first surface and a second surface opposite the first surface. The electronic assembly also includes at least one RF front-end module coupled to the first surface of the substrate, and a ground plane layer positioned on the second surface of the substrate. The electronic assembly also includes an insulating layer on the ground plane layer, with the ground plane layer positioned between the second surface and the insulating layer. In addition, the electronic assembly also includes an antenna layer on the insulating layer, with the insulating layer positioned between the antenna layer and the ground plane layer.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Xiang Yin ZENG, Jiangqi HE, Guizhen ZHENG
  • Publication number: 20080157294
    Abstract: A package may comprise a substrate provided with noise absorbing material. The noise absorbing material may absorb noise from a signal path in the substrate to prevent the noise from reaching other signals or signal paths.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Xiang Yin Zeng, Jiangqi He, Guizhen Zheng
  • Publication number: 20080157335
    Abstract: A semiconductor package has a substrate. The substrate comprises a set of interconnects. An dielectric material may be provided under one or more of the interconnects to adjust the impedance of transmission line.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Jia Miao Tang, Xiang Yin Zeng, Dao Qiang Lu, Jiang Qi He
  • Publication number: 20080157322
    Abstract: A method of forming a package, comprising providing a set of dies on a substrate. The substrate may have a first die on its upper side and a second die on its lower side. A first interconnect may be provided in the substrate, wherein the first interconnect penetrates through the substrate to couple the dies to the substrate.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Inventors: Jia Miao Tang, Xiang Yin Zeng, Daoqiang Lu, Jiangqi He
  • Publication number: 20080157324
    Abstract: A method of forming a package, comprising providing a set of dies on a substrate. The dies may be stacked on the substrate and may be coupled to the substrate by an interconnect provided on a side surface of the stacked dies.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Jia Miao Tang, Xiang Yin Zeng, Dao Qiang Lu, Jiang Qi He
  • Publication number: 20080145977
    Abstract: A conductive path, such as a copper patch, between decoupling capacitors and a high frequency integrated circuit, may be oxidized to improve the power delivery performance. Specifically, adding the resistance in the conductive path by oxidizing the conductive path increases the dampening of the peak impedance at a given peak frequency. In some embodiments, a mask may be used to control the amount of the conductive path that is oxidized.
    Type: Application
    Filed: December 18, 2006
    Publication date: June 19, 2008
    Inventors: Xiang Yin Zeng, Guo Yan, Jiangqi He
  • Publication number: 20080102565
    Abstract: In one embodiment, the present invention includes a semiconductor package with lossy material inserts. The lossy material inserts may reduce electronic noise such as package resonance. Other embodiments are described and claimed.
    Type: Application
    Filed: September 28, 2006
    Publication date: May 1, 2008
    Inventors: Xiang Yin Zeng, Daoqiang (Daniel) Lu, Jiangqi He, Jiamiao (John) Tang
  • Publication number: 20080079144
    Abstract: A method includes mating a first heat spreader and a second heat spreader, such that the first heat spreader at a mating surface and second heat spreader at a mating surface become parallel and adjacent. The mated first heat spreader and second heat spreader have at least one convection channel disposed therebetween. A process includes placing a first die in a first die recess of the first heat spreader, and placing a second die on a second die site on the second heat spreader. The process includes reflowing thermal interface material between each die and respective heat spreader. A package is achieved by the method, with reduced thicknesses. The package can be coupled through a bumpless build-up layer. The package can be assembled into a computing system.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Jiamiao Tang, Daoqiang Lu, Jiangqi He, Xiang Yin Zeng
  • Patent number: 7348661
    Abstract: An apparatus for filtering noise from an input/output (I/O) signal is disclosed. In various embodiments, the apparatus may be an array capacitor, and may be disposed between an electronic package and an underlying substrate such as a printed circuit board.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: March 25, 2008
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Ping Sun, Jiangqi He, Xiang Yin Zeng
  • Patent number: 7255573
    Abstract: Data signal interconnections are described that offer reduced cross talk particularly with high speed differential signaling. In one example, the invention includes a plurality of interconnects to carry data signals between a first component and a second component, the plurality of interconnects including a first set of interconnects oriented in a first direction and a second set of interconnects oriented in a second direction, different from the first direction.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventors: Jiangqi He, BaoShu Xu, Xiang Yin Zeng
  • Patent number: 7227247
    Abstract: In one embodiment, an integrated circuit package comprises a substrate including a first surface having a plurality of signal land pads and a second surface having a plurality of signal die pads; a plurality of signal connectors arranged to electrically couple the plurality of the signal land pads to the plurality of the signal die pads; and a ground plane, disposed in an adjacent, spaced-apart relationship to the plurality of signal land pads. The ground plane includes a plurality of holes with at least one of the holes having at least one of the signal connectors extending therethrough and being dimensioned and configured approximately to be as large or larger than at least one of the signal land pads disposed adjacent to the at least one hole.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: June 5, 2007
    Assignee: Intel Corporation
    Inventors: Xiang Yin Zeng, Jiangqi He, BaoShu Xu
  • Patent number: 7123466
    Abstract: Extending high k material of a second dielectric layer to surround at least one thru-via designed to provide a signal other than a power signal to a die may eliminate discrete AC coupling capacitors to reduce cost and improve performance of the package.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: October 17, 2006
    Assignee: Intel Corporation
    Inventors: Jiangqi He, Ping Sun, Hyunjun Kim, Xiang Yin Zeng
  • Patent number: 7027289
    Abstract: Extending high k material of a second dielectric layer to surround at least one thru-via designed to provide a signal other than a power signal to a die may eliminate discrete AC coupling capacitors to reduce cost and improve performance of the package.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Jiangqi He, Ping Sun, Hyunjun Kim, Xiang Yin Zeng