Abstract: A system which allows easy manual connection of the water bottle of a water cooler, with its bottle placed in an upright position at the bottom of the cooler (bottom load water cooler), to the remaining water system of the said water cooler and the related bottom load water cooler system. With the said system, connecting or disconnecting the water bottle of such water cooler system is a task as simple as manually turning a rotational handle clockwise or counter clockwise. This allows replacing the water bottle of such water cooler without touching any of its water pipes, which not only simplifies the process, but more importantly also eliminates chance of contamination of the drinking water system during the process. The system further utilizes a universal water bottle sealing cap with air filters to suppress bacteria growth in the drinking water bottle due to intake of polluted air.

Abstract: A gapless optical mode converter comprising a fiber holder configured to receive and hold an optical transmission line, a first glass block coupled via an optical adhesive at a first side to the fiber holder, a lens coupled via the optical adhesive at a first side to a second side of the first glass block, and a holder configured to hold the fiber holder, the first glass block, and the lens.

Abstract: An apparatus comprises a substrate comprising a silicon dioxide (SiO2) material disposed on top of the substrate, a silicon waveguide comprising a first adiabatic tapering and enclosed in the silicon dioxide material, and a low-index waveguide disposed on top of the substrate and adjacent to the first adiabatic tapering. A mode converter fabrication method comprises obtaining a mode converter comprising a substrate, a silicon waveguide disposed on the substrate and comprising a sidewall and a first adiabatic tapering, and a hard mask disposed on the silicon waveguide and comprising a silicon dioxide (SiO2) layer, wherein the hard mask does not cover the sidewall, and oxidizing the silicon waveguide and the hard mask, wherein oxidizing the silicon waveguide and the hard mask encloses the silicon waveguide within the silicon dioxide layer.

Abstract: A free space coupling system comprising a waveguide horizontally positioned on an integrated circuit, and a silicon housing coupled to the waveguide, wherein the silicon housing comprises a reflective surface, a first port, wherein the first port is configured to receive light from an optic source positioned substantially parallel to the waveguide at a coupling point, and a second port, wherein the second port is oriented at about ninety degrees with respect to the first port, and wherein the second port is aligned with a grating port on the waveguide.

Abstract: An optical modulator comprises a silicon substrate, a buried oxide (BOX) layer disposed on top of the silicon substrate, and a ridge waveguide disposed on top of the BOX layer and comprising a first n-type silicon (n-Si) slab, a first gate oxide layer coupled to the first n-Si slab, a first p-type silicon (p-Si) slab coupled to the first gate oxide layer, and a light propagation path that travels sequentially through the first n-Si slab, the first gate oxide layer, and the first p-Si slab.

Abstract: An optical modulator for generating quadrature amplitude modulation (nQAM) and phase-shift keying (nPSK) signals with tunable modulation efficiency. The modulator includes a controlling circuit for adjusting the modulation efficiency or modulation depth of the modulator by controlling the direct current (DC) bias.

Abstract: A free space coupling system comprising a waveguide horizontally positioned on an integrated circuit, and a silicon housing coupled to the waveguide, wherein the silicon housing comprises a reflective surface, a first port, wherein the first port is configured to receive light from an optic source positioned substantially parallel to the waveguide at a coupling point, and a second port, wherein the second port is oriented at about ninety degrees with respect to the first port, and wherein the second port is aligned with a grating port on the waveguide.

Abstract: An optical transceiver comprising an optical signal input, a first modulation section coupled to the optical signal input, a second modulation segment coupled to the optical signal input and positioned in serial with the first modulation section, wherein the first modulation section comprises a first digital electrical signal input, a first digital driver coupled to the first digital electrical signal input, and a first modulator coupled to the first digital driver, and wherein the second modulation section comprises a second digital electrical signal input, a second digital driver coupled to the second digital electrical signal input, and a second modulator coupled to the second digital driver, and an optical signal output coupled to the first modulation section and the second modulation section.

Abstract: A monolithically integrated thermal tunable laser comprising a layered substrate comprising an upper surface and a lower surface, and a thermal tuning assembly comprising a heating element positioned on the upper surface, a waveguide layer positioned between the upper surface and the lower surface, and a thermal insulation layer positioned between the waveguide layer and the lower surface, wherein the thermal insulation layer is at least partially etched out of an Indium Phosphide (InP) sacrificial layer, and wherein the thermal insulation layer is positioned between Indium Gallium Arsenide (InGaAs) etch stop layers.

Abstract: A metal-oxide-semiconductor (MOS) type semiconductor device, comprising a silicon substrate, a first cathode electrode and a second cathode electrode coupled to the silicon substrate and located on distal ends of the silicon substrate, a poly-silicon (Poly-Si) gate proximally located above the silicon substrate and between the first cathode electrode and the second cathode electrode, wherein the Poly-Si gate comprises a first post extending orthogonally relative to the silicon substrate comprising a first doped silicon slab, a second post extending orthogonally relative to the silicon substrate comprising a second doped silicon slab, wherein the second post is positioned so as to create a width between the first post and the second post, an anode electrode coupled to the first post and the second post and extending laterally from the first post to the second post, and a dielectric layer disposed between the first silicon substrate and the second silicon substrate.

Abstract: A method for wavelength conversion comprising receiving an input optical signal with a first wavelength, converting the input optical signal to a plurality of input analog signals, generating a plurality of digital signals based on the input analog signals, compensating for waveform distortions by at least filtering one or more of the digital signals to generate one or more compensated digital signals, converting the compensated digital signals to output analog signals via digital-to-analog (DA) conversion, generating an output optical signal with a second wavelength different from the first wavelength based on the output analog signals, and transmitting the output optical signal.

Abstract: An optical transceiver comprising an optical signal input, a first modulation section coupled to the optical signal input, a second modulation section coupled to the optical signal input and positioned in serial with the first modulation section, wherein the first modulation section comprises a first digital electrical signal input, a first digital driver coupled to the first digital electrical signal input, and a first modulator coupled to the first digital driver, and wherein the second modulation section comprises a second digital electrical signal input, a second digital driver coupled to the second digital electrical signal input, and a second modulator coupled to the second digital driver, and an optical signal output coupled to the first modulation section and the second modulation section.

Abstract: A silicon waveguide comprising a waveguide core that comprises a first positively doped (P1) region vertically adjacent to a second positively doped (P2) region. The P2 region is more heavily positively doped than the P1 region. A first negatively doped (N1) region is vertically adjacent to a second negatively doped (N2) region. The N2 region is more heavily negatively doped than the N1 region. The N2 region and the P2 region are positioned vertically adjacent to form a positive-negative (PN) junction. The N1 region, the N2 region, the P1 region, and the P2 region are positioned as a vertical PN junction and configured to completely deplete the P2 region of positive ions and completely deplete the N2 region of negative ions when a voltage drop is applied across the N1 region, the N2 region, the P1 region, and the P2 region.

Abstract: An electronic driver circuit for use with a modulator such as a segmented Mach-Zehnder Modulator (MZM) is provided. The electronic driver circuit includes a first delay buffer implemented as a first complementary metal-oxide-semiconductor (CMOS) inverter and a second delay buffer implemented as a second CMOS inverter. The second CMOS inverter follows the first CMOS inverter and has a second gate width smaller than a first gate width of the first CMOS inverter. The first CMOS inverter is configured to produce a first delayed electrical signal from a received electrical signal and the second CMOS inverter is configured to produce a second delayed electrical signal from the first delayed electrical signal produced by the first CMOS inverter.

Abstract: A metal-oxide-semiconductor (MOS) type semiconductor device, comprising a silicon substrate, a first cathode electrode and a second cathode electrode coupled to the silicon substrate and located on distal ends of the silicon substrate, a poly-silicon (Poly-Si) gate proximally located above the silicon substrate and between the first cathode electrode and the second cathode electrode, wherein the Poly-Si gate comprises a first post extending orthogonally relative to the silicon substrate comprising a first doped silicon slab, a second post extending orthogonally relative to the silicon substrate comprising a second doped silicon slab, wherein the second post is positioned so as to create a width between the first post and the second post, an anode electrode coupled to the first post and the second post and extending laterally from the first post to the second post, and a dielectric layer disposed between the first silicon substrate and the second silicon substrate.

Abstract: An optical transceiver comprising an optical signal input, a first modulation section coupled to the optical signal input, a second modulation section coupled to the optical signal input and positioned in serial with the first modulation section, wherein the first modulation section comprises a first digital electrical signal input, a first digital driver coupled to the first digital electrical signal input, and a first modulator coupled to the first digital driver, and wherein the second modulation section comprises a second digital electrical signal input, a second digital driver coupled to the second digital electrical signal input, and a second modulator coupled to the second digital driver, and an optical signal output coupled to the first modulation section and the second modulation section.

Abstract: A silicon waveguide comprising a waveguide core that comprises a first positively doped (P1) region vertically adjacent to a second positively doped (P2) region. The P2 region is more heavily positively doped than the P1 region. A first negatively doped (N1) region is vertically adjacent to a second negatively doped (N2) region. The N2 region is more heavily negatively doped than the N1 region. The N2 region and the P2 region are positioned vertically adjacent to form a positive-negative (PN) junction. The N1 region, the N2 region, the P1 region, and the P2 region are positioned as a vertical PN junction and configured to completely deplete the P2 region of positive ions and completely deplete the N2 region of negative ions when a voltage drop is applied across the N1 region, the N2 region, the P1 region, and the P2 region.

Abstract: An apparatus comprising a first electrical driver configured to generate a first binary voltage signal according to first data, a second electrical driver configured to generate a second binary voltage signal according to second data, wherein the first data and the second data are different, and a first optical waveguide arm coupled to the first electrical driver and the second electrical driver, wherein the first optical waveguide arm is configured to shift a first phase of a first optical signal propagating along the first optical waveguide arm according to a first voltage difference between the first binary voltage signal and the second binary voltage signal to produce a first, multi-level phase-shifted optical signal.

Abstract: Methods and apparatus for directly detected optical system based on gapped CAP modulation and DSP Methods for generation and reconstruction of gapped CAP signal are disclosed. An apparatus for direct detection transmission for CAP modulated signal with two unbalanced optical sidebands separated by gaps is disclosed, in which a gapped CAP signal is generated, converted, and passed to an optical filter for unbalanced sidebands generation and wavelength locking before being transmitted over an optical link. Direct detection is performed on the optical signal and passed to gapped matching filters. Channel equalization is performed and the signal information is decoded to binary data.

Abstract: A monolithically integrated thermal tunable laser comprising a layered substrate comprising an upper surface and a lower surface, and a thermal tuning assembly comprising a heating element positioned on the upper surface, a waveguide layer positioned between the upper surface and the lower surface, and a thermal insulation layer positioned between the waveguide layer and the lower surface, wherein the thermal insulation layer is at least partially etched out of an Indium Phosphide (InP) sacrificial layer, and wherein the thermal insulation layer is positioned between Indium Gallium Arsenide (InGaAs) etch stop layers.