Patents by Inventor XIAO-YANG XIAO

XIAO-YANG XIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11602741
    Abstract: The disclosure relates to a method for making a photocatalytic structure, the method comprising: providing a carbon nanotube structure comprising a plurality of carbon nanotubes intersected with each other; a plurality of openings being defined by the plurality of carbon nanotubes; forming a photocatalytic active layer on the surface of the carbon nanotube structure; applying a metal layer pre-form on the surface of the photocatalytic active layer; and annealing the metal layer pre-form.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: March 14, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ying-Cheng Wang, Yuan-Hao Jin, Xiao-Yang Xiao, Tian-Fu Zhang, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 11376577
    Abstract: The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a substrate, a photocatalytic active layer, and a metal layer. The substrate, the photocatalytic active layer, and the metal layer are arranged in succession. The substrate includes a base and a patterned bulge layer on a surface of the base. The patterned bulge layer is a net-like structure comprising a plurality of strip-shaped bulges intersected with each other and a plurality of indents defined by the plurality of strip-shaped bulges. The plurality of strip-shaped bulges is an integrated structure. The photocatalytic active layer is on the surface of the patterned bulge layer. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer away from the substrate.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: July 5, 2022
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ying-Cheng Wang, Yuan-Hao Jin, Xiao-Yang Xiao, Tian-Fu Zhang, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 11264516
    Abstract: A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a nano-scale semiconductor structure. The second electrode is located on the second end.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: March 1, 2022
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Publication number: 20210370282
    Abstract: The disclosure relates to a method for making a photocatalytic structure, the method comprising: providing a carbon nanotube structure comprising a plurality of carbon nanotubes intersected with each other; a plurality of openings being defined by the plurality of carbon nanotubes; forming a photocatalytic active layer on the surface of the carbon nanotube structure; applying a metal layer pre-form on the surface of the photocatalytic active layer; and annealing the metal layer pre-form.
    Type: Application
    Filed: August 10, 2021
    Publication date: December 2, 2021
    Inventors: YING-CHENG WANG, YUAN-HAO JIN, XIAO-YANG XIAO, TIAN-FU ZHANG, QUN-QING LI, SHOU-SHAN FAN
  • Patent number: 11173478
    Abstract: The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a carbon nanotube structure, a photocatalytic active layer coated on the carbon nanotube structure, and a metal layer including a plurality of nanoparticles located on the surface of the photocatalytic active layer. The carbon nanotube structure comprises a plurality of intersected carbon nanotubes and defines a plurality of openings, and the photocatalytic active layer is coated on the surface of the plurality of carbon nanotubes. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: November 16, 2021
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ying-Cheng Wang, Yuan-Hao Jin, Xiao-Yang Xiao, Tian-Fu Zhang, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 11011628
    Abstract: A method of making a thin film transistor, the method includes: providing a semiconductor layer; arranging a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure includes a single nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening; depositing a conductive film layer on the exposed surface using the nanowire structure as a mask, wherein the conductive film layer defines a nano-scaled channel, and the conductive film layer is divided into two regions, one region is used as a source electrode, and the other region is used as a drain electrode; forming an insulating layer on the semiconductor layer to cover the source electrode and the drain electrode, and locating a gate electrode on the insulating layer.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: May 18, 2021
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Xiao-Yang Xiao, Jin Zhang, Shou-Shan Fan
  • Patent number: 10790335
    Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: September 29, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Qun-Qing Li, Xiao-Yang Xiao, Guan-Hong Li, Yuan-Hao Jin, Shou-Shan Fan
  • Publication number: 20200238266
    Abstract: The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a carbon nanotube structure, a photocatalytic active layer coated on the carbon nanotube structure, and a metal layer including a plurality of nanoparticles located on the surface of the photocatalytic active layer. The carbon nanotube structure comprises a plurality of intersected carbon nanotubes and defines a plurality of openings, and the photocatalytic active layer is coated on the surface of the plurality of carbon nanotubes. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer.
    Type: Application
    Filed: April 10, 2019
    Publication date: July 30, 2020
    Inventors: YING-CHENG WANG, YUAN-HAO JIN, XIAO-YANG XIAO, TIAN-FU ZHANG, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20200243698
    Abstract: A photoelectric detector, which includes a substrate, a MoS2 semiconductor layer, an electrical signal detector, a first electrode and a second electrode. Said MoS2 semiconductor layer is located on the substrate, with the first electrode and the second electrode spaced from each other and electrically connected to the MoS2 semiconductor layer respectively. The electrical signal detector is configured to detect changes in electrical properties of the MoS2 semiconductor layer, and the material of the MoS2 semiconductor layer is amorphous MoS2 sheet.
    Type: Application
    Filed: December 13, 2019
    Publication date: July 30, 2020
    Inventors: ZHONG-ZHENG HUANG, TIAN-FU ZHANG, XIAO-YANG XIAO, JIE ZHAO, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20200238265
    Abstract: The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a substrate, a photocatalytic active layer, and a metal layer. The substrate, the photocatalytic active layer, and the metal layer are arranged in succession. The substrate includes a base and a patterned bulge layer on a surface of the base. The patterned bulge layer is a net-like structure comprising a plurality of strip-shaped bulges intersected with each other and a plurality of indents defined by the plurality of strip-shaped bulges. The plurality of strip-shaped bulges is an integrated structure. The photocatalytic active layer is on the surface of the patterned bulge layer. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer away from the substrate.
    Type: Application
    Filed: April 10, 2019
    Publication date: July 30, 2020
    Inventors: YING-CHENG WANG, YUAN-HAO JIN, XIAO-YANG XIAO, TIAN-FU ZHANG, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20200180269
    Abstract: A method for making a graphene adhesive film includes the following steps: growing a graphene on a growth substrate, wherein the material of the growth substrate is copper; depositing an adhesive layer on a surface of the graphene away from the growth substrate, to form an adhesive/graphene/growth substrate composite structure; and removing the growth substrate from the adhesive/graphene/growth substrate composite structure with an etching solution, wherein the etching solution is a mixture of hydrogen peroxide, hydrochloric acid, and deionized water.
    Type: Application
    Filed: March 12, 2019
    Publication date: June 11, 2020
    Inventors: TIAN-FU ZHANG, ZHONG-ZHENG HUANG, XIAO-YANG XIAO, YING-CHENG WANG, QUN-QING LI, SHOU-SHAN FAN
  • Patent number: 10680119
    Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode; the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: June 9, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Patent number: 10483472
    Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: November 19, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Patent number: 10475936
    Abstract: The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a gate on the substrate; a dielectric layer on the gate, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer formed by magnetron sputtering and in direct contact with the gate; a semiconductor layer on the dielectric layer, wherein the semiconductor layer includes nano-scaled semiconductor materials; and a source and a drain, wherein the source and the drain are on the dielectric layer, spaced apart from each other, and electrically connected to the semiconductor layer. The thin film transistor almost has no current hysteresis.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: November 12, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Jia Huo, Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Tian-Fu Zhang, Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 10431662
    Abstract: The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the first sub-dielectric layer. The thin film transistor almost has no current hysteresis.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 1, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Jia Huo, Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Tian-Fu Zhang, Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 10424480
    Abstract: A method of making a thin film transistor, the method including: providing an insulating layer on a semiconductor substrate, forming a semiconductor layer on the insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure comprises a nanowire; forming an opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, and the conductive film layer is divided into two regions by the nano-scaled channel, one region is used as a source electrode, and the other region is used as a drain electrode; forming a gate electrode on the semiconductor substrate.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 24, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Xiao-Yang Xiao, Jin Zhang, Shou-Shan Fan
  • Patent number: 10424479
    Abstract: A method of making nano-scaled channel, the method including: locating a first photoresist layer, a nanowire structure, and a second photoresist layer on a surface of a substrate, and the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises an nanowire; forming an opening in the first photoresist layer and the second photoresist layer to expose a portion of the surface of the substrate to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening, and both ends of the nanowire are sandwiched between the first photoresist layer and the second photoresist layer; and depositing a thin film layer on the exposed surface of the substrate using the a nanowire as a mask, wherein the thin film layer defines a nano-scaled channel corresponding to the at least one nanowire.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 24, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Xiao-Yang Xiao, Jin Zhang, Shou-Shan Fan
  • Patent number: 10381585
    Abstract: A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: August 13, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
  • Publication number: 20190245068
    Abstract: A method of making a thin film transistor, the method includes: providing a semiconductor layer; arranging a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure includes a single nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening; depositing a conductive film layer on the exposed surface using the nanowire structure as a mask, wherein the conductive film layer defines a nano-scaled channel, and the conductive film layer is divided into two regions, one region is used as a source electrode, and the other region is used as a drain electrode; forming an insulating layer on the semiconductor layer to cover the source electrode and the drain electrode, and locating a gate electrode on the insulating layer.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 8, 2019
    Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
  • Patent number: 10374180
    Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a carbon nanotube structure.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: August 6, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li