Patents by Inventor XIAO-YANG XIAO
XIAO-YANG XIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10347854Abstract: The disclosure relates to a logic circuit. The logic circuit includes two ambipolar thin film transistors. Each of the two ambipolar thin film transistors includes a substrate; a semiconductor layer located on the substrate and including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are located on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer located on the substrate and covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The two ambipolar thin film transistors share the same substrate, the same gate, and the same drain.Type: GrantFiled: November 20, 2017Date of Patent: July 9, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Yu-Jia Huo, Xiao-Yang Xiao, Ying-Cheng Wang, Tian-Fu Zhang, Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
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Patent number: 10326089Abstract: The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.Type: GrantFiled: November 20, 2017Date of Patent: June 18, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Yu-Jia Huo, Xiao-Yang Xiao, Ying-Cheng Wang, Tian-Fu Zhang, Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
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Patent number: 10312354Abstract: A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.Type: GrantFiled: December 22, 2017Date of Patent: June 4, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Xiao-Yang Xiao, Jin Zhang, Shou-Shan Fan
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Publication number: 20190157467Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode; the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end.Type: ApplicationFiled: January 4, 2019Publication date: May 23, 2019Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
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Patent number: 10297696Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end.Type: GrantFiled: December 19, 2017Date of Patent: May 21, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
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Publication number: 20190088722Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.Type: ApplicationFiled: November 8, 2018Publication date: March 21, 2019Inventors: YU-DAN ZHAO, QUN-QING LI, XIAO-YANG XIAO, GUAN-HONG LI, YUAN-HAO JIN, SHOU-SHAN FAN
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Patent number: 10217833Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a nano-scale semiconductor structure.Type: GrantFiled: December 19, 2017Date of Patent: February 26, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
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Patent number: 10199513Abstract: A Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode includes a first metal layer and a second metal layer. The second electrode includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure is a nano-scale semiconductor structure.Type: GrantFiled: December 19, 2017Date of Patent: February 5, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
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Patent number: 10192930Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.Type: GrantFiled: March 21, 2018Date of Patent: January 29, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Qun-Qing Li, Xiao-Yang Xiao, Guan-Hong Li, Yuan-Hao Jin, Shou-Shan Fan
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Patent number: 10193091Abstract: A Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode includes a first metal layer and a second metal layer. The second electrode includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a carbon nanotube structure.Type: GrantFiled: December 19, 2017Date of Patent: January 29, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
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Patent number: 10177199Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.Type: GrantFiled: May 3, 2016Date of Patent: January 8, 2019Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yu-Dan Zhao, Qun-Qing Li, Xiao-Yang Xiao, Guan-Hong Li, Yuan-Hao Jin, Shou-Shan Fan
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Publication number: 20180301543Abstract: A method of making a thin film transistor, the method including: providing an insulating layer on a semiconductor substrate, forming a semiconductor layer on the insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure comprises a nanowire; forming an opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, and the conductive film layer is divided into two regions by the nano-scaled channel, one region is used as a source electrode, and the other region is used as a drain electrode; forming a gate electrode on the semiconductor substrate.Type: ApplicationFiled: December 22, 2017Publication date: October 18, 2018Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
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Publication number: 20180301546Abstract: A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.Type: ApplicationFiled: December 22, 2017Publication date: October 18, 2018Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
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Publication number: 20180301340Abstract: A method of making nano-scaled channel, the method including: locating a first photoresist layer, a nanowire structure, and a second photoresist layer on a surface of a substrate, and the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises an nanowire; forming an opening in the first photoresist layer and the second photoresist layer to expose a portion of the surface of the substrate to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening, and both ends of the nanowire are sandwiched between the first photoresist layer and the second photoresist layer; and depositing a thin film layer on the exposed surface of the substrate using the a nanowire as a mask, wherein the thin film layer defines a nano-scaled channel corresponding to the at least one nanowire.Type: ApplicationFiled: December 22, 2017Publication date: October 18, 2018Inventors: MO CHEN, QUN-QING LI, LI-HUI ZHANG, XIAO-YANG XIAO, JIN ZHANG, SHOU-SHAN FAN
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Publication number: 20180219044Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.Type: ApplicationFiled: March 21, 2018Publication date: August 2, 2018Inventors: YU-DAN ZHAO, QUN-QING LI, XIAO-YANG XIAO, GUAN-HONG LI, YUAN-HAO JIN, SHOU-SHAN FAN
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Publication number: 20180212033Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a nano-scale semiconductor structure.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
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Publication number: 20180212171Abstract: A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: Yu-Dan Zhao, Xiao-Yang Xiao, Ying-Cheng Wang, Yuan-Hao Jin, Tian-Fu Zhang, Qun-Qing Li
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Publication number: 20180212068Abstract: A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a nano-scale semiconductor structure. The second electrode is located on the second end.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
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Publication number: 20180212174Abstract: A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a carbon nanotube structure.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI
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Publication number: 20180212173Abstract: A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: YU-DAN ZHAO, XIAO-YANG XIAO, YING-CHENG WANG, YUAN-HAO JIN, TIAN-FU ZHANG, QUN-QING LI