Abstract: The present disclosure provides an image processing method and apparatus, a device, and a medium, and relates to the field of image and video processing technologies. An implementation solution includes: performing frequency domain transform on a target image and obtaining a frequency coefficient matrix of the target image, the frequency coefficient matrix including at least one non-zero frequency coefficient; determining a non-zero block in the frequency coefficient matrix based on a position of the at least one non-zero frequency coefficient; determining a corresponding transform submatrix and a corresponding transposed submatrix of the non-zero block; and determining an inverse transform result of the frequency coefficient matrix based on the transform submatrix, the non-zero block, and the transposed submatrix.

Abstract: Exemplary semiconductor processing methods may include providing a first silicon-containing precursor and a second silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The first silicon-containing precursors may include Si—O bonding. The methods may include forming a plasma of the first silicon-containing precursor and the second silicon-containing precursor in the processing region. The methods may include forming a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant less than or about 3.0.

Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor in the processing region. The plasma may be at least partially formed by a pulsing RF power operating at less than or about 2,000 W. The methods may include forming a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant less than or about 3.0.

Abstract: A compound as represented by formula (I) and a pharmaceutical composition thereof, wherein the compound or the pharmaceutical composition can regulate the activity of JAK, especially the activity of TYK2, and can be used for preventing, processing, treating and relieving diseases or disorders mediated by JAK.

Abstract: A distributed multi-camera real-time tumor positioning and tracking method based on a visual position-aware mark and tracking system thereof includes the steps: carrying out the coding of a high-density self-identification visual mark and obtaining a specific Hella code; detecting and identifying the Hella code; based on the identified Hella code, carrying out spatial positioning and full-view registration on the marked mark features, and applying the Hella code to tumor positioning and tracking. According to the method, high-precision sensing of the position of the patient is realized; by analyzing the medical image data, the position, posture, and anatomical structure information of the patient can be accurately determined, and accurate positioning and navigation are provided for accurate radiotherapy.

Abstract: Exemplary processing methods may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a layer of a silicon-containing material. The methods may include forming inductively-coupled plasma effluents of the treatment precursor. The methods may include contacting the layer of the silicon-containing material with the inductively-coupled plasma effluents of the treatment precursor to produce a treated layer of the silicon-containing material. The contacting may reduce a dielectric constant of the layer of the silicon-containing material.

Abstract: The present disclosure provides techniques for image processing. The techniques comprise obtaining a residual coefficient matrix of a target image, the residual coefficient matrix including at least one non-zero coefficient; determining a maximum scan ordinal for the residual coefficient matrix; sequentially reading a predetermined number of residual coefficients in the residual coefficient matrix in a horizontal scanning mode; updating an encoding quantity parameter for the residual coefficient matrix based on an ordinal comparison result between a scan ordinal of each of the read residual coefficients and the maximum scan ordinal and a coefficient value of each of the read residual coefficients; and determining an encoding bit number of the residual coefficient matrix based on a final encoding quantity parameter after reading all residual coefficients in the residual coefficient matrix.

Abstract: Semiconductor processing methods are described for forming low-? dielectric materials. The methods may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-carbon-and-hydrogen-containing precursor. A substrate may be disposed within the processing region. The methods may include forming plasma effluents of the deposition precursors. The methods may include depositing a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant of less than or about 4.0.

Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor in the processing region. The plasma may be at least partially formed by an RF power operating at between about 50 W and 1,000 W, at a pulsing frequency below about 100,000 Hz, and at a duty cycle between about 5% and 95%. The methods may include forming a layer of material on the substrate. The layer of material may include a silicon-containing material.

Abstract: The present invention provides compounds, or pharmaceutically acceptable salts, esters, optical isomers, stereoisomers, polymorphs, solvates, N-oxides, isotopically labeled compounds, metabolites, chelates, complexes, clathrates, or prodrugs thereof, and pharmaceutical compositions containing the compounds of the invention. Also provides the application of the compounds in preparing SHP2 phosphatase related disease medicaments. The present invention also provides a method for treating a SHP2 phosphatase-Related disease.

Abstract: An integrated circuit-based nano-relay, comprising: an integrated circuit system of the nano-relay constructed according to an integrated circuit module built from a combinational logic circuit. An integrated power data processing algorithm is called by means of the integrated circuit module to perform signal processing on an input power signal, and power service data is output, that is, an integrated circuit is mainly constructed by means of the combinational logic circuit, the protection logic of the nano-relay is achieved by means of a hardware circuit module, and a response speed of the relay is improved.

Abstract: Provided is the following compound or a pharmaceutically acceptable salt, ester, optical isomer, stereoisomer, polymorphic substance, solvate, N-oxide, isotope-labeled compound, metabolite, chelate, coordination complex, inclusion compound or prodrug thereof, and a pharmaceutical composition comprising the compound. Also provided is an application of the compound in preparing a drug for a disease associated with SHP2 phosphatase. Also provided is a method for treating a disease associated with SHP2 phosphatase.

Abstract: A high-pressure SCR system with venting and pressure-stabilizing for marine diesel engine, comprising an SCR reactor, a gas intake pipeline, an exhaust pipeline, a bypass pipeline, a pneumatic pipeline, first and second auxiliary pipelines When denitrification treatment is needed, the exhaust gas can enter from a flue gas inlet, sequentially pass through the gas intake pipeline, the SCR reactor, and the exhaust pipeline, and be discharged from a flue gas outlet. When denitrification treatment is not needed, the exhaust gas can enter the bypass pipeline from the flue gas inlet and be discharged from the flue gas outlet, the exhaust gas in the SCR reactor and exhaust pipeline being pushed by compressed air entering from the first and second auxiliary pipelines to be discharged from the flue gas outlet. Also provided is a ship.

Abstract: An integrated circuit-based nano-relay, comprising: an integrated circuit system of the nano-relay constructed according to an integrated circuit module built from a combinational logic circuit. An integrated power data processing algorithm is called by means of the integrated circuit module to perform signal processing on an input power signal, and power service data is output, that is, an integrated circuit is mainly constructed by means of the combinational logic circuit, the protection logic of the nano-relay is achieved by means of a hardware circuit module, and a response speed of the relay is improved.

Abstract: A target structure includes a target and a cooling portion. The target generates neutrons by being irradiated with a charged particle beam. The cooling portion includes a front surface and a back surface that face to sides opposite to each other. The target is joined directly or indirectly to the front surface. A flow path for flowing of cooling liquid including hydrogen elements is formed in the cooling portion. When viewed in a thickness direction of the cooling portion from the front surface to the back surface, the flow path is positioned off a center portion of the target.

Abstract: A chip-level software and hardware cooperative relay protection device is provided. The device includes: a control chip, wherein a first control unit, a second control unit, and multiple logic circuits are integrated on the control chip; and the logic circuits perform microsecond-level rapid calculation on electrical signals of a protected electrical device, obtain fault feature parameters of the protected electrical device are and transmit same to the first control unit, then perform millisecond-level real-time protection logic determination according to the fault feature parameters of the protected electrical device to obtain relay protection results of the protected electrical device, and protect the protected electrical device by controlling an external relay according to the relay protection results.

Abstract: A chip-level software and hardware cooperative relay protection device is provided. The device includes: a control chip, wherein a first control unit, a second control unit, and multiple logic circuits are integrated on the control chip; and the logic circuits perform microsecond-level rapid calculation on electrical signals of a protected electrical device, obtain fault feature parameters of the protected electrical device are and transmit same to the first control unit, then perform millisecond-level real-time protection logic determination according to the fault feature parameters of the protected electrical device to obtain relay protection results of the protected electrical device, and protect the protected electrical device by controlling an external relay according to the relay protection results.

Abstract: Embodiments include semiconductor processing methods to form low-K films on semiconductor substrates are described. The processing methods may include flowing one or more deposition precursors to a semiconductor processing system, wherein the one or more deposition precursors include a silicon-containing precursor. The silicon-containing precursor may include a carbon chain. The methods may include generating a deposition plasma from the one or more deposition precursors. The methods may include depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant less than or about 3.0.

Abstract: Embodiments include semiconductor processing methods to form low-? films on semiconductor substrates are described. The processing methods may include flowing one or more deposition precursors to a semiconductor processing system. The one or more deposition precursors may include a silicon-containing precursor that may be a cyclic compound. The methods may include generating a deposition plasma from the one or more deposition precursors. The methods may include depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant less than or about 3.0.

Abstract: Exemplary semiconductor processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber. A semiconductor substrate may be positioned within the processing region. The methods may include forming a layer of low dielectric constant material on the semiconductor substrate. The methods may include purging the processing region of the one or more deposition precursors. A plasma power may be maintained at less than or about 750 W while purging the processing region. The methods may include forming an interface layer on the layer of low dielectric constant material. The methods may include forming a cap layer on the interface layer.