Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.

Abstract: An asynchronous instruction execution apparatus and method are provided. The asynchronous instruction execution apparatus includes a vector execution unit control VXUC module and n vector execution unit data VXUD modules, where n is a positive integer. The VXUC module is configured to perform instruction decoding and token management. The n VXUD modules are cascaded, separately connected to the VXUC module, and configured to invoke an external calculation resource to perform data calculation. A bit width of data processed by the asynchronous instruction execution apparatus is M, a bit width of each VXUD module is N, and n=M/N. The asynchronous instruction execution apparatus is divided into two parts: the VXUC and the VXUD.

Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.

Abstract: The present disclosure relates to encoding method and devices. One example method includes determining N to-be-encoded bits, where the N to-be-encoded bits include information bits and frozen bits, obtaining a first polarization weight vector including polarization weights of N polarized channels, where the N to-be-encoded bits correspond to the N polarized channels, determining positions of the information bits based on the first polarization weight vector, and performing polar encoding on the N to-be-encoded bits to obtain polar-encoded bits.

Abstract: The present disclosure relates to decoding methods and devices. One example method includes receiving N LLRs corresponding to a to-be-decoded signal, where N is a code length, classifying K decoded bits into reliable bits and unreliable bits based on at least one of a prior LLR or a posterior LLR, generating M decoding paths based on the N LLRs and a preset rule, and selecting each stage of target decoding path based on PM values of the M decoding paths to obtain a decoding result of each stage of decoded bit.

Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes allocating, from a set of sub-channels, one or more sub-channels for one or more parity bits based on row weights for sub-channels in a subset of sub-channels within the set of sub-channels, mapping information bits to remaining sub-channels in the set of sub-channels based on a reliability of the remaining sub-channels without mapping any of the information bits to the one or more sub-channels allocated for the one or more parity bits, polar encoding the information bits and the one or more parity bits based on at least the mapping of the information bits to the remaining sub-channels to obtain encoded bits, and transmitting the encoded bits to another device.

Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.

Abstract: Disclosed are a test apparatus and a testable asynchronous circuit. The test apparatus includes: a first input end, a second input end, a third input end, a fourth input end, a fifth input end, a first selector, a second selector, a D flip-flop, and a first output end. The first input end is configured to input a data signal or a test result of a previous circuit under test; the second input end is configured to input a test excitation signal or a test result that is output by a previous test apparatus; the third input end is configured to input a clock signal; the fourth input end is configured to input a selection signal; and the fifth input end is configured to input a selection signal.

Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.

Abstract: The present invention discloses a liquid crystal photo-alignment device. The liquid crystal photo-alignment device includes two parallel guide rails, a platform sandwiched between the two guide rails, a support assembly slidably mounted on the two guide rails, and a cleaning assembly mounted to the support assembly. The platform has a supporting surface for supporting a LCD panel. Each support assembly includes a supporting beam across the platform, two supporting arms extending from opposite ends of the supporting beam, and two sliders connected to the respective supporting arms. The sliders are slidably mounted in the guide rails. The cleaning assembly faces toward the platform and is configured to clean up foreign objects on the platform.

Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. The row weight for a sub-channel may be viewed as the number of “ones” in the corresponding row of the Kronecker matrix or as a power of 2 with the exponent (i.e. the hamming weight) being the number of “ones” in the binary representation of the sub-channel index (further described below). In one embodiment, candidate sub-channels that have certain row weight values are reserved for parity bit(s). Thereafter, K information bits may be mapped to the K most reliable remaining sub-channels, and a number of frozen bits (e.g. N?K) may be mapped to the least reliable remaining sub-channels. Parity bits may then mapped to the candidate sub-channels, and parity bit values are determined based on a function of the information bits.

Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. The row weight for a sub-channel may be viewed as the number of “ones” in the corresponding row of the Kronecker matrix or as a power of 2 with the exponent (i.e. the hamming weight) being the number of “ones” in the binary representation of the sub-channel index (further described below). In one embodiment, candidate sub-channels that have certain row weight values are reserved for parity bit(s). Thereafter, K information bits may be mapped to the K most reliable remaining sub-channels, and a number of frozen bits (e.g. N?K) may be mapped to the least reliable remaining sub-channels. Parity bits may then mapped to the candidate sub-channels, and parity bit values are determined based on a function of the information bits.

Abstract: An asynchronous instruction execution apparatus and method are provided. The asynchronous instruction execution apparatus includes a vector execution unit control VXUC module and n vector execution unit data VXUD modules, where n is a positive integer. The VXUC module is configured to perform instruction decoding and token management. The n VXUD modules are cascaded, separately connected to the VXUC module, and configured to invoke an external calculation resource to perform data calculation. A bit width of data processed by the asynchronous instruction execution apparatus is M, a bit width of each VXUD module is N, and n=M/N. The asynchronous instruction execution apparatus is divided into two parts: the VXUC and the VXUD.

Abstract: A processor is disclosed. The processor includes: at least one execution unit group, where each execution unit group in the at least one execution unit group includes multiple serially-connected execution units; and at least one resource unit, where each resource unit in the at least one resource unit is serially connected to one or more execution unit groups in the at least one execution unit group separately. According to the processor, execution units in an execution unit group are serially connected, and a resource unit is serially connected to one or more execution unit groups, so that only a few execution units can be directly connected to the resource unit, and cable layout congestion at the resource unit and resulting signal interference are avoided.

Abstract: Disclosed are a test apparatus and a testable asynchronous circuit. The test apparatus includes: a first input end, a second input end, a third input end, a fourth input end, a fifth input end, a first selector, a second selector, a D flip-flop, and a first output end. The first input end is configured to input a data signal or a test result of a previous circuit under test; the second input end is configured to input a test excitation signal or a test result that is output by a previous test apparatus; the third input end is configured to input a clock signal; the fourth input end is configured to input a selection signal; and the fifth input end is configured to input a selection signal.

Abstract: The present invention discloses a liquid crystal photo-alignment device. The liquid crystal photo-alignment device includes two parallel guide rails, a platform sandwiched between the two guide rails, a support assembly slidably mounted on the two guide rails, and a cleaning assembly mounted to the support assembly. The platform has a supporting surface for supporting a LCD panel. Each support assembly includes a supporting beam across the platform, two supporting arms extending from opposite ends of the supporting beam, and two sliders connected to the respective supporting arms. The sliders are slidably mounted in the guide rails. The cleaning assembly faces toward the platform and is configured to clean up foreign objects on the platform.

Abstract: A blood pump control system includes a local processing terminal and a remote processing terminal. The local processing terminal is configured to transmit to the remote processing terminal, collected current state parameters of the blood pump and heart activity indexes, and to drive and control the blood pump according to blood pump adjusting parameters received from the remote processing terminal. The remote processing terminal is configured to obtain current blood pump adjusting parameters according to the current state parameters, and the heart activity indexes received from the local processing terminal, and set adjusting conditions; and to transmit the blood pump adjusting parameters back to the local processing terminal.

Abstract: A lift mechanism for a glass substrate in an exposure machine is provided, which comprises a base, a lift platform mounted on the top of the base and used to lift the glass substrate, lift bars mounted on the perimeter of the base, and at least one adsorbing devices mounted above the glass substrate; the lift bars are used to lift the perimeter of the glass substrate; each of the adsorbing devices is used to adsorb the upper surface of the substrate and able to move along the vertical direction and the horizontal direction.

Abstract: The present invention provides an ultraviolet light oven for aligning liquid crystal molecules, comprising a plurality of ultraviolet light sources, each of the reflectors including a reflecting surface facing to the ultraviolet light source, wherein the reflector includes a first optical portion in the form of recess defined on the refracting surface. The present invention further provides an ultraviolet light oven for aligning liquid crystal molecules, and by providing a first optical portion on a reflecting surface of the reflector, and a second optical portion on the side surface of the reflector to as to properly reflect the light beam with is not directly projected toward the substrate and therefore increase the utilization of the ultraviolet light, the exposure and homogeneousness of the ultraviolet light. As a result, the exposing period is shortened, the working efficiency is increased.

Abstract: The present invention provides an ultraviolet light oven for aligning liquid crystal molecules, comprising a plurality of ultraviolet light sources, each of the reflectors including a reflecting surface facing to the ultraviolet light source, wherein the reflector includes a first optical portion in the form of recess defined on the refracting surface. The present invention further provides an ultraviolet light oven for aligning liquid crystal molecules, and by providing a first optical portion on a reflecting surface of the reflector, and a second optical portion on the side surface of the reflector to as to properly reflect the light beam with is not directly projected toward the substrate and therefore increase the utilization of the ultraviolet light, the exposure and homogeneousness of the ultraviolet light. As a result, the exposing period is shortened, the working efficiency is increased.