Patents by Inventor Xiaocheng Liu

Xiaocheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210176007
    Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 10, 2021
    Inventors: Rong LI, Gongzheng ZHANG, Ying CHEN, Xiaocheng LIU, Jun WANG
  • Patent number: 10892851
    Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: January 12, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Rong Li, Gongzheng Zhang, Ying Chen, Xiaocheng Liu, Jun Wang
  • Patent number: 10879939
    Abstract: The present disclosure relates to decoding methods and devices. One example method includes receiving N LLRs corresponding to a to-be-decoded signal, where N is a code length, classifying K decoded bits into reliable bits and unreliable bits based on at least one of a prior LLR or a posterior LLR, generating M decoding paths based on the N LLRs and a preset rule, and selecting each stage of target decoding path based on PM values of the M decoding paths to obtain a decoding result of each stage of decoded bit.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: December 29, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jun Wang, Rong Li, Huazi Zhang, Xian Meng, Xiaocheng Liu
  • Patent number: 10879932
    Abstract: The present disclosure relates to encoding method and devices. One example method includes determining N to-be-encoded bits, where the N to-be-encoded bits include information bits and frozen bits, obtaining a first polarization weight vector including polarization weights of N polarized channels, where the N to-be-encoded bits correspond to the N polarized channels, determining positions of the information bits based on the first polarization weight vector, and performing polar encoding on the N to-be-encoded bits to obtain polar-encoded bits.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: December 29, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xiaocheng Liu, Ying Chen, Rong Li
  • Publication number: 20200343916
    Abstract: A decoding method and apparatus are provided, to improve a degree of parallelism in decoded bit decisions and reduce a decoding delay. The method includes: performing a hard decision on each LLR in an inputted LLR vector having a length of M to obtain a first vector, where M?N and N is a length of to-be-decoded information; sequentially performing negation of some elements of the first vector to obtain L vectors; and then determining decoding results of the LLR vector based on the L vectors.
    Type: Application
    Filed: July 8, 2020
    Publication date: October 29, 2020
    Inventors: Jiajie TONG, Huazi ZHANG, Yunfei QIAO, Rong LI, Xiaocheng LIU, Jun WANG
  • Publication number: 20200295867
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.
    Type: Application
    Filed: June 4, 2020
    Publication date: September 17, 2020
    Applicants: Huawei Technologies Co., Ltd., Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu
  • Patent number: 10700808
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: June 30, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Patent number: 10644829
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. The row weight for a sub-channel may be viewed as the number of “ones” in the corresponding row of the Kronecker matrix or as a power of 2 with the exponent (i.e. the hamming weight) being the number of “ones” in the binary representation of the sub-channel index (further described below). In one embodiment, candidate sub-channels that have certain row weight values are reserved for parity bit(s). Thereafter, K information bits may be mapped to the K most reliable remaining sub-channels, and a number of frozen bits (e.g. N?K) may be mapped to the least reliable remaining sub-channels. Parity bits may then mapped to the candidate sub-channels, and parity bit values are determined based on a function of the information bits.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: May 5, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Patent number: 10637607
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. The row weight for a sub-channel may be viewed as the number of “ones” in the corresponding row of the Kronecker matrix or as a power of 2 with the exponent (i.e. the hamming weight) being the number of “ones” in the binary representation of the sub-channel index (further described below). In one embodiment, candidate sub-channels that have certain row weight values are reserved for parity bit(s). Thereafter, K information bits may be mapped to the K most reliable remaining sub-channels, and a number of frozen bits (e.g. N?K) may be mapped to the least reliable remaining sub-channels. Parity bits may then mapped to the candidate sub-channels, and parity bit values are determined based on a function of the information bits.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: April 28, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Publication number: 20200092035
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes allocating, from a set of sub-channels, one or more sub-channels for one or more parity bits based on row weights for sub-channels in a subset of sub-channels within the set of sub-channels, mapping information bits to remaining sub-channels in the set of sub-channels based on a reliability of the remaining sub-channels without mapping any of the information bits to the one or more sub-channels allocated for the one or more parity bits, polar encoding the information bits and the one or more parity bits based on at least the mapping of the information bits to the remaining sub-channels to obtain encoded bits, and transmitting the encoded bits to another device.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 19, 2020
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yigun Ge, Xiaocheng Liu
  • Publication number: 20200059246
    Abstract: A polar code coding/decoding method, a sending device, and a receiving device are disclosed. The method includes: selecting, by a sending device, K non-punctured-position sequence numbers as a reference sequence number set based on a quantity K of information bits and a reliability-based order of N polarized channels of a polar code whose code length is N, where a reliability of a polarized channel corresponding to any sequence number in the reference sequence number set is greater than or equal to reliabilities of polarized channels corresponding to remaining (N?K) sequence numbers; determining, by the sending device, an information-bit sequence number set based on a determining condition and the reference sequence number set; and performing, by the sending device, polar coding on to-be-coded bits based on the information-bit sequence number set.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 20, 2020
    Inventors: Ying CHEN, Xiaocheng LIU, Lingchen HUANG, Yue ZHOU, Rong LI, Hejia LUO, Jun WANG
  • Patent number: 10491326
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes allocating, from a set of sub-channels, one or more sub-channels for one or more parity bits based on row weights for sub-channels in a subset of sub-channels within the set of sub-channels, mapping information bits to remaining sub-channels in the set of sub-channels based on a reliability of the remaining sub-channels without mapping any of the information bits to the one or more sub-channels allocated for the one or more parity bits, polar encoding the information bits and the one or more parity bits based on at least the mapping of the information bits to the remaining sub-channels to obtain encoded bits, and transmitting the encoded bits to another device.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: November 26, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Publication number: 20190207711
    Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.
    Type: Application
    Filed: March 7, 2019
    Publication date: July 4, 2019
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Rong Li, Gongzheng Zhang, Ying Chen, Xiaocheng Liu, Jun Wang
  • Patent number: 10338921
    Abstract: An asynchronous instruction execution apparatus and method are provided. The asynchronous instruction execution apparatus includes a vector execution unit control VXUC module and n vector execution unit data VXUD modules, where n is a positive integer. The VXUC module is configured to perform instruction decoding and token management. The n VXUD modules are cascaded, separately connected to the VXUC module, and configured to invoke an external calculation resource to perform data calculation. A bit width of data processed by the asynchronous instruction execution apparatus is M, a bit width of each VXUD module is N, and n=M/N. The asynchronous instruction execution apparatus is divided into two parts: the VXUC and the VXUD.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: July 2, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Shaola Yang, Xiaocheng Liu, Zhen Xu
  • Patent number: 10326555
    Abstract: Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 18, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Rong Li, Gongzheng Zhang, Ying Chen, Xiaocheng Liu, Jun Wang
  • Publication number: 20190165807
    Abstract: The present disclosure relates to decoding methods and devices. One example method includes receiving N LLRs corresponding to a to-be-decoded signal, where N is a code length, classifying K decoded bits into reliable bits and unreliable bits based on at least one of a prior LLR or a posterior LLR, generating M decoding paths based on the N LLRs and a preset rule, and selecting each stage of target decoding path based on PM values of the M decoding paths to obtain a decoding result of each stage of decoded bit.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 30, 2019
    Inventors: Jun WANG, Rong LI, Huazi ZHANG, Xian MENG, Xiaocheng LIU
  • Publication number: 20190165813
    Abstract: The present disclosure relates to encoding method and devices. One example method includes determining N to-be-encoded bits, where the N to-be-encoded bits include information bits and frozen bits, obtaining a first polarization weight vector including polarization weights of N polarized channels, where the N to-be-encoded bits correspond to the N polarized channels, determining positions of the information bits based on the first polarization weight vector, and performing polar encoding on the N to-be-encoded bits to obtain polar-encoded bits.
    Type: Application
    Filed: January 29, 2019
    Publication date: May 30, 2019
    Inventors: Xiaocheng LIU, Ying CHEN, Rong LI
  • Publication number: 20190089481
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes allocating, from a set of sub-channels, one or more sub-channels for one or more parity bits based on row weights for sub-channels in a subset of sub-channels within the set of sub-channels, mapping information bits to remaining sub-channels in the set of sub-channels based on a reliability of the remaining sub-channels without mapping any of the information bits to the one or more sub-channels allocated for the one or more parity bits, polar encoding the information bits and the one or more parity bits based on at least the mapping of the information bits to the remaining sub-channels to obtain encoded bits, and transmitting the encoded bits to another device.
    Type: Application
    Filed: October 17, 2018
    Publication date: March 21, 2019
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Publication number: 20190068316
    Abstract: Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.
    Type: Application
    Filed: October 17, 2018
    Publication date: February 28, 2019
    Inventors: Huazi Zhang, Jiajie Tong, Rong Li, Jun Wang, Wen Tong, Yiqun Ge, Xiaocheng Liu, Gongzheng Zhang, Jian Wang, Nan Cheng, Qifan Zhang
  • Patent number: 10209299
    Abstract: Disclosed are a test apparatus and a testable asynchronous circuit. The test apparatus includes: a first input end, a second input end, a third input end, a fourth input end, a fifth input end, a first selector, a second selector, a D flip-flop, and a first output end. The first input end is configured to input a data signal or a test result of a previous circuit under test; the second input end is configured to input a test excitation signal or a test result that is output by a previous test apparatus; the third input end is configured to input a clock signal; the fourth input end is configured to input a selection signal; and the fifth input end is configured to input a selection signal.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: February 19, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Zhen Xu, Yuqing Zhao, Xiaocheng Liu