Abstract: An optical device includes an LED chip, a light absorber and/or visible-light luminescent material, and a near-infrared luminescent material, wherein a luminous power of light emitted by the near-infrared luminescent material and the light absorber and/or visible-light luminescent material in a band of 650-1000 nm under the excitation of the LED chip is A, and a sum of a luminous power of light emitted by the near-infrared and visible-light luminescent materials in a band of 350-650 nm under the excitation of the LED chip and a luminous power of residual light emitted by the LED chip in the band of 350-650 nm after the LED chip excites the near-infrared and visible-light luminescent materials is B, with B/A*100% being 0.1%-10%. According to the implementation where the optical device employs the LED chip to combine the near-infrared luminescent material and the light absorber and/or visible-light luminescent material simultaneously.

Abstract: The invention relates to a phosphor with garnet structure and a light-emitting device comprising the phosphor, wherein the phosphor includes the following components in percentage by weight: 38.47-45.19% of Y element, 9.49-22.09% of Al element, 2.06-24.31% of Ga element, 27.3-32.04% of O element, 0.43-1.46% of Ce element. In the phosphor particles, the shortest distance from the surface of one side of the particle to the surface of the opposite side through the centroid of the particle is defined as R, the longest distance is R1, and 5 ?m?R?40 ?m; any distance from the particle surface to the centroid is r, and 0<r<½R; and the space with the distance from the particle surface to the centroid direction being less than or equal to r is defined as rinner.

Abstract: An optical device includes an LED chip, a visible-light luminescent material, and a near-infrared luminescent material, wherein a luminous power of light emitted by the near-infrared and visible-light luminescent materials in a band of 650-1000 nm under the excitation of the LED chip is A, and a sum of a luminous power of light emitted by the near-infrared and visible-light luminescent materials in a band of 350-650 nm under the excitation of the LED chip and a luminous power of residual light emitted by the LED chip in the band of 350-650 nm after the LED chip excites the near-infrared and visible-light luminescent materials is B, with B/A*100% being 0.1%-10%. According to the implementation where the optical device employs the LED chip to combine the near-infrared luminescent material and the visible-light luminescent material simultaneously.

Abstract: A method for preparing a durably hydrophilic and uniform-pore ultrafiltration membrane is disclosed herein. Chemical reactions between the functional groups and the active bonds of the molecular chains in the membrane materials are initiated perform the grafting of hydrophilic chains on the polymer chains under conventional dissolution conditions of the polymer membrane material (dissolution with synchronized hydrophilization), so as to realize durable hydrophilization of the membrane materials. The resulting hydrophilized polymer solution (a nascent-state membrane) is introduced into a coagulation bath to initiate a crosslinking reaction among the hydrophilic chains. The resulting crosslinking serves to synergistically regulate subsequent phase separation and membrane formation (phase separation under synergistic crosslinking).

Abstract: The present invention provides a method for preparing a modular scaffold that can bind to a target antigen and a method for engineering a bispecific functional agent consisting of an existing polypeptide binder fused at its C-terminus with said modular scaffold.

Abstract: The present invention provides a triple-mode antibody display system that simultaneously matures, displays and secretes an antibody to a target of interest. An antibody in vivo-matured and complexed with membrane anchored bait can be expressed on the surface of the host cell, while complexed with a soluble bait the antibody is secreted from the host cell. Methods of using the system for identifying binders that bind specifically to an antigen of interest are also provided. Polypeptides, polynucleotides and host cells useful for making the protein binder display system are also provided along with methods of use thereof.

Abstract: The present invention provides a triple-mode antibody display system that simultaneously matures, displays and secretes an antibody to a target of interest. An antibody in vivo-matured and complexed with membrane anchored bait can be expressed on the surface of the host cell, while complexed with a soluble bait the antibody is secreted from the host cell. Methods of using the system for identifying binders that bind specifically to an antigen of interest are also provided.

Abstract: The present invention provides a method for preparing a modular scaffold that can bind to a target antigen and a method for engineering a bispecific functional agent consisting of an existing polypeptide binder fused at its C-terminus with said modular scaffold.

Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.

Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.

Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.

Abstract: A circuit comprises a digital phase locked loop for generating a synchronization signal and a voltage regulator for providing regulated output voltage responsive to the synchronization signal from the digital phase locked loop.

Abstract: A circuit comprises a digital phase locked loop for generating a synchronization signal and a voltage regulator for providing regulated output voltage responsive to the synchronization signal from the digital phase locked loop.

Abstract: A circuit comprises a digital phase locked loop for generating a synchronization signal and a voltage regulator for providing regulated output voltage responsive to the synchronization signal from the digital phase locked loop.

Abstract: Circuits, methods, and apparatus for adjusting an NCO output in order to provide a signal that is phase-locked to a reference signal. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides a circuit that corrects the phase of the NCO output in two steps in order to reduce the chance of metastability. During the first, the output of the NCO is phase shifted to the closest correct portion of a cycle of a clock signal. A second correction is then performed by steering a number of currents under the control of at least some of a number of remainder bits from the NCO. The current steering provides a die area efficient, low-noise phase correction. The decoded remainder bits are latched using a feed forward circuit that prevents the device from entering a locked state.

Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.

Abstract: A circuit comprises a digital phase locked loop for generating a synchronization signal and a voltage regulator for providing regulated output voltage responsive to the synchronization signal from the digital phase locked loop.

Abstract: Circuits, methods, and apparatus for reducing the phase error in an NCO clock output to reduce the clock jitter. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides a circuit that corrects the phase of the NCO output in two steps in order to obtain a substantially glitch-free, high-speed operation. During the first step, the output of the NCO is phase shifted to the closest quarter portion of a cycle of a clock signal. A second correction step is then performed by steering a number of currents under the control of at least some of a number of remainder bits from the NCO. The current steering provides a die area efficient, low-noise phase correction. The decoded remainder bits are latched using a feed forward circuit that prevents the device from entering a locked state.

Abstract: A continuous-time filter is highly linear even when used with reduced 3-volt power supplies. In each stage of a multi-stage ladder network, resistor networks are attached to each input of a differential op amp. Each resistor network uses fixed resistors in series between the inputs and an intermediate node, and a fixed input resistor between the intermediate node and the op-amp input. The fixed input resistor improves linearity compared with a linear transistor. A transistor connects the internal node to ground, acting as a variable resistor to adjust the equivalent resistance of the resistor network. A control voltage applied to the gate of the transistor is generated by an analog control loop. The control voltage is the voltage input to a voltage-controlled oscillator (VCO) in a phase-locked loop (PLL). The analog PLL control loop adjusts the control voltage and the resistance continuously as the filter operates.

Abstract: A soft clipper circuit in CMOS technology not only allows the knee to be programmed, but also the slope of the curve after the knee to be programmed. This is accomplished by putting a second transconductance in parallel with the first transconductance, and using a switching circuit to connect the output of the second transconductance to that of the first transconductance when the knee level is reached. This is determined by a comparator which has an input coupled to the second transconductance and controls a control node of the switching circuit.