Abstract: The present application discloses a solar cell and a photovoltaic module. The solar cell includes a cell body, where a width of the cell body is L1 along a first direction; and a patterned region on a surface of the cell body. The patterned region has a plurality of fingers extending along a second direction, the plurality of fingers comprise first fingers and second fingers spaced from the plurality of first fingers along the first direction. The cell body has a first side and a second side opposite to the first side, each of the first side and the second side extending along the second direction. A distance between the first side and a position of the patterned region closest to the first side is D1. When the first fingers and the second fingers have opposite polarities, 80?L1/D1?400. When the first fingers and the second fingers have a same polarity, 50?L1/D1?350.

Abstract: A semiconductor structure includes a field effect transistor with a first drain-source region, a second drain-source region, at least one channel region connecting the first drain-source region and the second drain-source region, and a gate at least partially contacting the at least one channel region. A backside power delivery network is below the field effect transistor; a backside contact is connected to the backside power delivery network; a backside via is coupled directly to the backside contact and runs vertically upward next to the field effect transistor; and a frontside contact includes a frontside contact conductive fill coupled directly to the backside via and a frontside contact liner between the frontside contact conductive fill and one of the first drain-source region and the second drain-source region.

Abstract: A nanosheet semiconductor structure including a backside contact structure beneath a first source drain region, and a bottom inner spacer directly beneath a second source drain region adjacent to the backside contact structure.

Abstract: A method of fabricating a semiconductor device, includes providing a semiconductor structure having a dielectric stack and a mandrel layer positioned on the dielectric stack. An array of sacrificial mandrel features are patterned into the mandrel layer and on top of an insulating layer of the dielectric stack. A self-aligned non-mandrel cut is formed adjacent a spacer element located adjacent to one of the sacrificial mandrel features. The sacrificial mandrel features are removed. One or more self-aligned mandrel cuts are formed in one or more of the plurality of trenches. Non-mandrel openings are formed on top of the insulating layer. Continuity line openings are etched into the dielectric stack, wherein the non-mandrel cut interrupts a first of the continuity line openings and the mandrel cut is disposed to interrupt a second of the continuity line openings. Metal lines are formed in the continuity line openings, except where the non-mandrel cut and mandrel cut are disposed.

Abstract: A semiconductor integrated circuit (IC) devices are described. The IC devices include a confined backside contact that includes and upper portion and a lower portion in direct contact with the upper portion. The confined backside contact may be formed by processes which may result in the formation of the upper portion and lower portion. The processes may ease possible masking, photolithography, feature placement and/or alignment challenges in the formation of backside contacts and may reduce backside contact shorting failures, thereby increasing yield of the IC devices.

Abstract: A coil component is provided. The coil component includes: a coil formed by connecting multiple U-shaped members and I-shaped members each having a thickness of 5 mm or more; a mounting bracket made of a metal member and fixing the coil component to an installation target surface; and an insulating member disposed between the coil and the mounting bracket. The U-shaped members and the I-shaped members are not covered around their peripheries with an insulating coating, and a fitting hole is formed in the mounting bracket. The insulating member includes: coil supporting portions into which respective turns of the coil are inserted and which fit with the respective turns, and a protruding portion that fits in the fitting hole and fixes the insulating member to the mounting bracket.

Abstract: Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a first source/drain (S/D) electrically connected to a backside contact on a backside. A device may include a second S/D electrically connected to a frontside contact on a frontside. A device may include a channel comprising a bottom dielectric isolation (BDI) between the first S/D and the second S/D. A device may include a backside interlayer dielectric (BILD) protruding past the BDI into direct contact with the second S/D. A device may include a residual silicon between the BILD and the backside contact.

Abstract: A nanosheet semiconductor structure including a backside contact structure, top semiconductor layer adjacent to, and in electrical contact with, a bottom portion of the backside contact structure, and sidewall spacers between and physically separating a top portion of the backside contact structure from the top semiconductor layer.

Abstract: A method includes providing a semiconductor structure comprising an insulating layer, forming sacrificial mandrel features on top of the insulating layer, and forming a spacer layer by depositing spacer material conformally around the sacrificial mandrel features. The method includes forming a non-mandrel cut region between a first sacrificial mandrel feature and a second sacrificial mandrel feature of the sacrificial mandrel features, forming a first layer region in the non-mandrel cut region, and forming a mandrel cut region by removing a third sacrificial mandrel feature of the sacrificial mandrel features. The method further includes forming a second placeholder layer in the removed portion of the third sacrificial mandrel feature, performing a mandrel pull-back process to remove the first sacrificial mandrel feature and the second sacrificial mandrel feature, and adjusting a thickness of sidewalls of the spacer layer exposed by the mandrel pull-back process.

Abstract: An antistatic release film, comprising a substrate layer, an antistatic coating, and a release agent coating. The antistatic coating is located between the release agent coating and the substrate layer; the antistatic coating is obtained by drying a coating liquid; and the coating liquid is composed of the following components in parts by weight: 100 parts of polyurethane resin, 40-60 parts of polyvinyl alcohol, 2-4 parts of sodium octyl sulfate, 1-3 parts of N-ethyl-N—(3-sulfopropyl)-3-methylaniline sodium salt, 8-12 parts of dibutyl sebacate, 40-60 parts of n-butanol, 20-30 parts of isobutyl acetate, 0.8-1.5 parts of hydroxyethyl cellulose, 0.3-0.8 part pf 3-acetylbenzoic acid, 0.2-0.8 part of triethylenetetramine, 0.5-1.2 parts of a silane coupling agent, 0.5-1 part of an antioxidant, and 0.6-2 parts of a leveling agent.

Abstract: A structure is provided that includes a thermal dissipation measurement sensor located on the frontside or the backside of a semiconductor device. The thermal dissipation measurement sensor includes a first probe region and a second probe region that are interconnected by a plurality of metal lines that are arranged in a serpentine pattern and having at least one non-powered metal line located between, and spaced apart from, each of the metal lines.

Abstract: A semiconductor device includes a first source/drain region and a second source/drain region. The semiconductor device includes a first contact connecting the first source/drain region to a backside power distribution network and a second contact connecting the second source/drain region to a frontside interconnect layer. The semiconductor device further includes a first gate structure separated from a second gate structure by an isolation region, where the first gate structure is associated with the first source/drain region and the second gate structure is associated with the second source/drain region, and a gate jumper positioned below the isolation region and connected to the first gate structure and the second gate structure.

Abstract: The present invention relates to methods of upregulating the high mannose glycoform content of a recombinant protein during a mammalian cell culture by manipulating the mannose to total hexose ratio in the cell culture media formulation.

Abstract: A semiconductor device, comprising a source/drain epitaxy. A first dielectric cap is under the source/drain epitaxy on a backside of the semiconductor device. The semiconductor device includes a gate and a second dielectric cap formed under the gate. A spacer separates the first dielectric cap and the source/drain epitaxy from the second dielectric cap and the gate.

Abstract: Semiconductor devices having a direct backside contact are provided. In one aspect, a semiconductor device includes: at least one FET on a frontside of a wafer, where the wafer includes a semiconductor layer, and where a most backside-facing surface of the semiconductor layer is planar; and a backside contact disposed on the most backside-facing surface of the semiconductor layer, where the backside contact directly contacts source/drain regions of the at least one FET. A local wiring layer can be disposed on a most backside-facing surface of the backside contact. A method of fabricating the present semiconductor devices is also provided.

Abstract: A semiconductor device includes a substrate having a frontside, a backside, and a transistor that includes a gate region, a first source/drain region of a first depth into the substrate, and a second source/drain region of a second depth into the substrate. The semiconductor device further includes a backside contact (BC) region extending from the backside into the substrate and electrically connected to the first source/drain region. The semiconductor device further includes a backside partial diffusion break (BPDB) region that includes a non-conducting material, extending from the backside into the substrate and distinct from the first source/drain region.