Patents by Inventor Xiaoshe Deng
Xiaoshe Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10096699Abstract: A field-stop reverse conducting insulated gate bipolar transistor and a manufacturing method therefor. The transistor comprises a terminal structure (200) and an active region (100). An underlayment of the field-stop reverse conducting insulated gate bipolar transistor is an N-type underlayment, the back surface of the underlayment is provided with an N-type electric field stop layer (1), one surface of the electric field stop layer departing from the underlayment is provided with a back-surface P-type structure (10), and the surface of the back-surface P-type structure is provided with a back-surface metal layer (12). A plurality of notches (11) which penetrate through the back-surface P-type structure (10) from the back-surface metal layer (12) to the electric field stop layer (1) are formed in the active region (100), and metals of the back-surface metal layer (12) are filled into the notches (11) to form a metal structure which extends into the electric field stop layer (1).Type: GrantFiled: June 5, 2014Date of Patent: October 9, 2018Assignee: CSMC Technologies Fab1 Co., Ltd.Inventors: Shuo Zhang, Qiang Rui, Genyi Wang, Xiaoshe Deng
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Patent number: 10084036Abstract: An insulated gate bipolar transistor (100) is provided. A substrate (10) of the insulated gate bipolar transistor (100) is of an N type. A P-type region (16) is disposed on a back of the N-type substrate. A back metal structure (18) is disposed on a back of the P-type region (16). A terminal protection ring is disposed in a terminal structure. A polysilicon gate (31) is disposed on a front surface of the substrate (10) in an active region. Sidewalls (72) are disposed at two sides of the polysilicon gate (31) on the substrate (10). An interlayer medium (81) covered with the polysilicon gate (31) and the sidewalls (72) is disposed on the substrate (10). The interlayer medium (81) is covered with a metal lead wire layer (91). An N-type carrier enhancement region (41) is disposed in the substrate (10) in the active region. A P-type body region (51) is disposed in the carrier enhancement region (41). An N-type heavily doped region (61) is disposed in the P-type body region (51).Type: GrantFiled: December 13, 2017Date of Patent: September 25, 2018Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Shengrong Zhong, Dongfei Zhou, Xiaoshe Deng, Genyi Wang
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Patent number: 10062746Abstract: A semiconductor rectifying device includes a substrate of a first conductivity type, an epitaxial layer of the first conductivity type, a filling structure, an upper electrode, a guard ring, and a guard layer. The epitaxial layer defines a plurality of trenches thereon. The filling structure includes an insulating material formed on the inner surface of the trench and a conductive material filled in the trench. A doped region of a second conductivity type is formed in the surface of the epitaxial layer between the filling structures. A method of manufacturing a semiconductor rectifying device includes forming an epitaxial layer of a first conductivity type on a substrate of the first conductivity type, defining a plurality of trenches on the epitaxial layer, forming a plurality of filling structures in the plurality of trenches, and forming a doped region in the epitaxial layer between the filling structures.Type: GrantFiled: September 10, 2015Date of Patent: August 28, 2018Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Shengrong Zhong, Xiaoshe Deng, Dongfei Zhou
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Patent number: 9954074Abstract: An insulated gate bipolar transistor and a manufacturing method therefor. The insulated gate bipolar transistor comprises a semiconductor substrate (1) of a first conductive type, which is provided with a first major surface (1S1) and a second major surface (1S2), wherein the semiconductor substrate (1) comprises a primitive cell area (2) and a terminal protection area (4) which is located outside the primitive cell area; a first semiconductor layer (5) of a first conductive type which is formed at the side of the first major surface of the semiconductor substrate (1), wherein the doping concentration of the first semiconductor layer (5) is higher than the doping concentration of the semiconductor substrate (1); and an insulated gate transistor unit which is formed at the side of the first major surface of the first semiconductor layer (5) in the primitive cell area, wherein the insulated gate transistor unit is conducted, a channel of a first conductive type is formed.Type: GrantFiled: July 22, 2014Date of Patent: April 24, 2018Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Shengrong Zhong, Xiaoshe Deng, Genyi Wang, Dongfei Zhou
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Publication number: 20180102406Abstract: An insulated gate bipolar transistor (100) is provided. A substrate (10) of the insulated gate bipolar transistor (100) is of an N type. A P-type region (16) is disposed on a back of the N-type substrate. A back metal structure (18) is disposed on a back of the P-type region (16). A terminal protection ring is disposed in a terminal structure. A polysilicon gate (31) is disposed on a front surface of the substrate (10) in an active region. Sidewalls (72) are disposed at two sides of the polysilicon gate (31) on the substrate (10). An interlayer medium (81) covered with the polysilicon gate (31) and the sidewalls (72) is disposed on the substrate (10). The interlayer medium (81) is covered with a metal lead wire layer (91). An N-type carrier enhancement region (41) is disposed in the substrate (10) in the active region. A P-type body region (51) is disposed in the carrier enhancement region (41). An N-type heavily doped region (61) is disposed in the P-type body region (51).Type: ApplicationFiled: December 13, 2017Publication date: April 12, 2018Inventors: Shengrong ZHONG, Dongfei ZHOU, Xiaoshe DENG, Genyi WANG
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Patent number: 9881994Abstract: An insulated gate bipolar transistor (100) is provided. A substrate (10) of the insulated gate bipolar transistor (100) is of an N type. A P-type region (16) is disposed on a back of the N-type substrate. A back metal structure (18) is disposed on a back of the P-type region (16). A terminal protection ring is disposed in a terminal structure. A polysilicon gate (31) is disposed on a front surface of the substrate (10) in an active region. Sidewalls (72) are disposed at two sides of the polysilicon gate (31) on the substrate (10). An interlayer medium (81) covered with the polysilicon gate (31) and the sidewalls (72) is disposed on the substrate (10). The interlayer medium (81) is covered with a metal lead wire layer (91). An N-type carrier enhancement region (41) is disposed in the substrate (10) in the active region. A P-type body region (51) is disposed in the carrier enhancement region (41). An N-type heavily doped region (61) is disposed in the P-type body region (51).Type: GrantFiled: August 25, 2014Date of Patent: January 30, 2018Assignee: CSMC Technologies Fabl Co., Ltd.Inventors: Shengrong Zhong, Dongfei Zhou, Xiaoshe Deng, Genyi Wang
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Publication number: 20170352722Abstract: A semiconductor rectifying device and a method of manufacturing the same. The semiconductor rectifying device includes: a substrate of a first conductivity type (100), an epitaxial layer of a first conductivity type (200) formed on the substrate of the first conductivity type (100), wherein the epitaxial layer of the first conductivity type (200) defines a plurality of trenches (310) thereon; a filling structure (300) comprising an insulating material formed on the inner surface of the trench (310) and a conductive material filled in the trench (310); a doped region of a second conductivity type (400) formed in the surface of the epitaxial layer of the first conductivity type (200) located between the filling structures (300); an upper electrode (600) formed on a surface of the epitaxial layer of the first conductivity type (200); a guard ring (700) formed in the surface layer of the epitaxial layer of the first conductivity type (200); and a guard layer (800).Type: ApplicationFiled: September 10, 2016Publication date: December 7, 2017Inventors: Shengrong ZHONG, Xiaoshe DENG, Dongfei ZHOU
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Patent number: 9673193Abstract: A manufacturing method for reverse conducting insulated gate bipolar transistor, the manufacturing method is characterized by the use of polysilicon for filling in grooves on the back of a reverse conducting insulated gate bipolar transistor. The parameters of reverse conducting diodes on the back of the reverse conducting insulated gate bipolar transistor can be controlled simply by controlling the doping concentration of the polysilicon accurately, indicating relatively low requirements for process control. The reverse conducting insulated gate bipolar transistor manufacturing method is relatively low in requirements for process control and relatively small in manufacturing difficulty.Type: GrantFiled: August 19, 2014Date of Patent: June 6, 2017Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Shuo Zhang, Qiang Rui, Genyi Wang, Xiaoshe Deng
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Patent number: 9666682Abstract: A reverse conducting insulated gate bipolar transistor (IGBT) manufacturing method, comprising the following steps: providing a substrate having an IGBT structure formed on the front surface thereof; implanting P+ ions onto the back surface of the substrate; forming a channel on the back surface of the substrate through photolithography and etching processes; planarizing the back surface of the substrate through a laser scanning process to form P-type and N-type interval structures; and forming a back surface collector by conducting a back metalizing process on the back surface of the substrate. Laser scanning process can process only the back surface structure requiring annealing, thus solve the problem of the front surface structure of the reverse conducting IGBT restricting back surface annealing to a low temperature, improving the P-type and N-type impurity activation efficiency in the back surface structure of the reverse conducting IGBT, and enhancing the performance of the reverse conducting IGBT.Type: GrantFiled: September 2, 2014Date of Patent: May 30, 2017Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Wanli Wang, Xiaoshe Deng, Genyi Wang, Qiang Rui
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Patent number: 9620615Abstract: An insulated gate bipolar transistor (IGBT) manufacturing method comprises the following steps: providing a semiconductor substrate of a first conducting type, the semiconductor substrate having a first major surface and a second major surface (100); forming a field-stop layer of a second conducting type on the first major surface of the semiconductor substrate (200); growing an oxide layer on the field-stop layer (300); removing the oxide layer from the field-stop layer (400); forming an epitaxial layer on the field-stop layer from which the oxide layer has been removed; and then manufacturing an IGBT on the epitaxial layer (600). Before regular manufacturing of an IGBT, the surface defects of a substrate material are eliminated as many as possible before epitaxy is formed, and the quality of an epitaxial layer is improved, thereby improving the quality of the whole IGBT.Type: GrantFiled: July 29, 2014Date of Patent: April 11, 2017Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Xiaoshe Deng, Qiang Rui, Shuo Zhang, Genyi Wang
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Patent number: 9607851Abstract: Disclosed is a method for removing a polysilicon protection layer (12) on a back face of an IGBT having a field stop structure (10). The method comprises thermally oxidizing the polysilicon protection layer (12) on the back face of the IGBT until the oxidation is terminated on a gate oxide layer (11) located above the polysilicon protection layer (12) to form a silicon dioxide layer (13), and removing the formed silicon dioxide layer (13) and the gate oxide layer (11) by a dry etching process. The method for removing the protection layer is easier to control.Type: GrantFiled: July 25, 2013Date of Patent: March 28, 2017Assignee: CMSC TECHNOLOGIES FAB1 CO., LTD.Inventors: Qiang Rui, Shuo Zhang, Genyi Wang, Xiaoshe Deng
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Patent number: 9595520Abstract: An insulated gate bipolar translator (IGBT) with a built-in diode and a manufacturing method thereof are provided.Type: GrantFiled: June 9, 2014Date of Patent: March 14, 2017Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Xiaoshe Deng, Shuo Zhang, Qiang Rui, Genyi Wang
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Patent number: 9590029Abstract: A method for manufacturing an insulated gate bipolar transistor (100) comprises: providing a substrate (10), forming a field oxide layer (20) on a front surface of the substrate (10), and forming a terminal protection ring (23); performing photoetching and etching on the active region field oxide layer (20) by using an active region photomask, introducing N-type ions into the substrate (10) by using a photoresist as a mask film; depositing and forming a polysilicon gate (31) on the etched substrate (10) of the field oxide layer (20), and forming a protection layer on the polysilicon gate (31); performing junction pushing on an introduction region of the N-type ions, and then forming a carrier enhancement region (41); performing photoetching by using a P well photomask, introducing P-type ions into the carrier enhancement region (41), and performing junction pushing and then forming a P-body region; performing, by means of the polysilicon gate, self-alignment introduction of N-type ions into the P-body region,Type: GrantFiled: August 25, 2014Date of Patent: March 7, 2017Assignee: CSMC Technologies Fab1 Co., Ltd.Inventors: Shengrong Zhong, Dongfei Zhou, Xiaoshe Deng, Genyi Wang
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Patent number: 9583587Abstract: A method for manufacturing an injection-enhanced insulated-gate bipolar transistor, comprising the following steps: an n-type substrate (12) is provided; a p-type doped layer (14) is formed on the n-type substrate (12); a hard layer (20) is formed on the p-type doped layer (14); a groove (40) extending to the n-type substrate (12) is formed by etching on the p-type doped layer (14); an n-type doped layer (50) is formed on the sidewalls and bottom of the groove (40); the hard layer (20) is removed; p-type impurities of the p-type doped layer (14) and n-type impurities of the n-type doped layer (50) are driven in together, where the p-type impurities are diffused to form a p-type base region (60), and the n-type impurities are diffused to form an n-type buffer layer (70); a gated oxide dielectric layer (80) is formed on the surface of the groove (40); and, a polysilicon layer (90) is deposited in the groove having formed therein the gate oxide dielectric layer (80).Type: GrantFiled: July 23, 2014Date of Patent: February 28, 2017Assignee: CSMC TECHNOLOGIES FABI CO., LTD.Inventors: Wanli Wang, Xiaoshe Deng, Genyi Wang, Xuan Huang
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Publication number: 20160380072Abstract: An insulated gate bipolar transistor and a manufacturing method therefor. The insulated gate bipolar transistor comprises a semiconductor substrate (1) of a first conductive type, which is provided with a first major surface (1S1) and a second major surface (1S2), wherein the semiconductor substrate (1) comprises a primitive cell area (2) and a terminal protection area (4) which is located outside the primitive cell area; a first semiconductor layer (5) of a first conductive type which is formed at the side of the first major surface of the semiconductor substrate (1), wherein the doping concentration of the first semiconductor layer (5) is higher than the doping concentration of the semiconductor substrate (1); and an insulated gate transistor unit which is formed at the side of the first major surface of the first semiconductor layer (5) in the primitive cell area, wherein the insulated gate transistor unit is conducted, a channel of a first conductive type is formed.Type: ApplicationFiled: July 22, 2014Publication date: December 29, 2016Inventors: Shengrong ZHONG, Xiaoshe DENG, Genyi WANG, Dongfei ZHOU
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Publication number: 20160379974Abstract: A manufacturing method for reverse conducting insulated gate bipolar transistor, the manufacturing method is characterized by the use of polysilicon for filling in grooves on the back of a reverse conducting insulated gate bipolar transistor. The parameters of reverse conducting diodes on the back of the reverse conducting insulated gate bipolar transistor can be controlled simply by controlling the doping concentration of the polysilicon accurately, indicating relatively low requirements for process control. The reverse conducting insulated gate bipolar transistor manufacturing method is relatively low in requirements for process control and relatively small in manufacturing difficulty.Type: ApplicationFiled: August 19, 2014Publication date: December 29, 2016Applicant: CSMC Technologies FAB1 Co., Ltd.Inventors: Shuo ZHANG, Qiang RUI, Genyi WANG, Xiaoshe DENG
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Publication number: 20160380048Abstract: A method for manufacturing an insulated gate bipolar transistor (100) comprises: providing a substrate (10), forming a field oxide layer (20) on a front surface of the substrate (10), and forming a terminal protection ring (23); performing photoetching and etching on the active region field oxide layer (20) by using an active region photomask, introducing N-type ions into the substrate (10) by using a photoresist as a mask film; depositing and forming a polysilicon gate (31) on the etched substrate (10) of the field oxide layer (20), and forming a protection layer on the polysilicon gate (31); performing junction pushing on an introduction region of the N-type ions, and then forming a carrier enhancement region (41); performing photoetching by using a P well photomask, introducing P-type ions into the carrier enhancement region (41), and performing junction pushing and then forming a P-body region; performing, by means of the polysilicon gate, self-alignment introduction of N-type ions into the P-body region,Type: ApplicationFiled: August 25, 2014Publication date: December 29, 2016Inventors: Shengrong Zhong, Dongfei Zhou, Xiaoshe Deng, Genyi Wang
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Publication number: 20160380071Abstract: An insulated gate bipolar transistor (IGBT) manufacturing method comprises the following steps: providing a semiconductor substrate of a first conducting type, the semiconductor substrate having a first major surface and a second major surface (100); forming a field-stop layer of a second conducting type on the first major surface of the semiconductor substrate (200); growing an oxide layer on the field-stop layer (300); removing the oxide layer from the field-stop layer (400); forming an epitaxial layer on the field-stop layer from which the oxide layer has been removed; and then manufacturing an IGBT on the epitaxial layer (600). Before regular manufacturing of an IGBT, the surface defects of a substrate material are eliminated as many as possible before epitaxy is formed, and the quality of an epitaxial layer is improved, thereby improving the quality of the whole IGBT.Type: ApplicationFiled: July 29, 2014Publication date: December 29, 2016Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Xiaoshe DENG, Qiang RUI, Shuo ZHANG, Genyi WANG
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Publication number: 20160372571Abstract: A reverse conducting insulated gate bipolar transistor (IGBT) manufacturing method, comprising the following steps: providing a substrate having an IGBT structure formed on the front surface thereof; implanting P+ ions onto the back surface of the substrate; forming a channel on the back surface of the substrate through photolithography and etching processes; planarizing the back surface of the substrate through a laser scanning process to form P-type and N-type interval structures; and forming a back surface collector by conducting a back metalizing process on the back surface of the substrate. Laser scanning process can process only the back surface structure requiring annealing, thus solve the problem of the front surface structure of the reverse conducting IGBT restricting back surface annealing to a low temperature, improving the P-type and N-type impurity activation efficiency in the back surface structure of the reverse conducting IGBT, and enhancing the performance of the reverse conducting IGBT.Type: ApplicationFiled: September 2, 2014Publication date: December 22, 2016Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Wanli Wang, Xiaoshe DENG, Genyi WANG, Qiang RUI
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Publication number: 20160372573Abstract: A method for manufacturing an injection-enhanced insulated-gate bipolar transistor, comprising the following steps: an n-type substrate (12) is provided; a p-type doped layer (14) is formed on the n-type substrate (12); a hard layer (20) is formed on the p-type doped layer (14); a groove (40) extending to the n-type substrate (12) is formed by etching on the p-type doped layer (14); an n-type doped layer (50) is formed on the sidewalls and bottom of the groove (40); the hard layer (20) is removed; p-type impurities of the p-type doped layer (14) and n-type impurities of the n-type doped layer (50) are driven in together, where the p-type impurities are diffused to form a p-type base region (60), and the n-type impurities are diffused to form an n-type buffer layer (70); a gated oxide dielectric layer (80) is formed on the surface of the groove (40); and, a polysilicon layer (90) is deposited in the groove having formed therein the gate oxide dielectric layer (80).Type: ApplicationFiled: July 23, 2014Publication date: December 22, 2016Inventors: Wanli Wang, Xiaoshe Deng, Genyi Wang, Xuan Huang