Abstract: Disclosed are a display substrate, a display panel and a display device. The display substrate includes a base substrate, and a display region and a frame region located on a side of the base substrate. The display region includes a plurality of scanning signal lines extending in a first direction, and a plurality of transfer signal lines and a plurality of data signal lines extending in a second direction crossing the first direction. The scanning signal lines and the data signal lines are provided on different layers, the scanning signal lines and the transfer signal lines are provided on different layers, the data signal lines and the transfer signal lines are provided on the same layer, the scanning signal lines are connected to at least one of the transfer signal lines, and different scanning signal lines are connected to different transfer signal lines.

Abstract: A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.

Abstract: A display substrate is provided to include a base substrate including an active display region and a dummy region, the dummy region includes at least one first dummy sub-region arranged in a first direction together with the active display region; active gate lines in the active display region and extending along the first direction, at least one end of at least one active gate line extends into a first dummy sub-region on the same side as the at least one end; and at least one dummy data line within the first dummy sub-region and extending along a second direction; an orthographic projection of an end of the at least one active gate line in the first dummy sub-region on the base substrate does not overlap with an orthographic projection of any dummy data line on the base substrate. A display panel and a display apparatus are further provided.

Abstract: Provided is display panel. The display panel includes: a base substrate; multiple first signal traces, multiple second signal traces, multiple pixel circuits arranged in an array, multiple pixel electrodes corresponding to the plurality of pixel circuits, a common electrode provided with multiple first openings corresponding to the plurality of pixel circuits, and a black matrix layer, wherein an orthographic projection of each first opening on the base substrate covers orthographic projections of the first connection position, the second connection position, and the third connection position of the pixel circuit corresponding to the first opening on the base substrate, and an orthographic projection of the black matrix layer on the base substrate covers orthographic projections of the first openings on the base substrate.

Abstract: A multiplexer circuit, a multiplexing module, a display device and a driving method are provided. The multiplexer circuit is electrically coupled to M data voltage providing ends and a plurality of data lines. The multiplexer circuit includes N multiplexing control lines and N multiplexing circuits, an nth multiplexing circuit includes M multiplexing sub-circuits, and an nth multiplexing control line includes M control lines. An mth multiplexing sub-circuit included in an nth multiplexing circuit is electrically coupled to an mth control line in the nth multiplexing control line, an mth data voltage providing end and a corresponding data line, and configured to write a data voltage provided by the mth data voltage providing end into the corresponding data line under the control of a control signal provided by the mth control line.

Abstract: A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.

Abstract: The present disclosure provides a liquid crystal writing board and a method for repairing the same. The liquid crystal writing board includes a first substrate, a second substrate, and a bistable liquid crystal layer disposed between the first substrate and the second substrate. The first substrate includes a plurality of first signal line groups, the first signal line group including at least two first signal lines; a plurality of second signal lines, the first signal lines and the second signal lines intersecting with each other; and a control electrode disposed in an area surrounded by two adjacent first signal lines and two adjacent second signal lines, the first signal lines and the second signal lines being configured to jointly provide control signals to the control electrode. The first signal lines in the first signal line group are electrically connected with each other.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate comprises: a display area and a frame area located at the periphery of the display area, wherein the frame area comprises a frame sealant arrangement area, and the frame sealant arrangement area comprises a corner area; the display substrate further comprising: an organic film layer, wherein the organic film layer comprises an annular groove and at least one arc-shaped groove, the annular groove surrounds the display area, and the annular groove is located in the frame sealant arrangement area; the arc-shaped groove is located in the corner area.

Abstract: A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate comprises: a display area and a frame area located at the periphery of the display area, wherein the frame area comprises a frame sealant arrangement area, and the frame sealant arrangement area comprises a corner area; the display substrate further comprising: an organic film layer, wherein the organic film layer comprises an annular groove and at least one arc-shaped groove, the annular groove surrounds the display area, and the annular groove is located in the frame sealant arrangement area; the arc-shaped groove is located in the corner area.

Abstract: An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, including a plurality of data lines and a plurality of scanning lines; a metal layer, including a plurality of metal blocks located at intersections of the data lines and the scanning lines; a signal lead, including a data lead and a scanning lead, where the data lead is connected to the data lines and is arranged in a same layer as the data lines, and the scanning lead is arranged in a same layer as the scanning lines; a touch control lead, located at the side of the base substrate and located in the peripheral area, where the touch control lead is connected to the touch control signal lines and is arranged in a same layer as the touch control signal lines.

Abstract: Disclosed are a display substrate, a display panel and a display device. The display substrate includes: a base substrate, multiple gate-line groups, multiple data lines, the multiple data line include: first type of data lines and second type of data lines alternately arranged along the first direction; multiple transistors, transistors in the same sub-transistor group are connected with the same gate line, transistors in adjacent sub-transistor groups are connected with different gate lines, and transistors of the same sub-transistor group are connected with different data lines; multiple pins, the multiple pins include: first type of pins and second type of pins alternately arranged along the first direction; two adjacent first type of data lines are connected with a same first type of pin, and adjacent second type of data lines are connected with a same second type of pin.

Abstract: An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.

Abstract: The present disclosure provides a liquid crystal writing board and a method for repairing the same. The liquid crystal writing board includes a first substrate, a second substrate, and a bistable liquid crystal layer disposed between the first substrate and the second substrate. The first substrate includes a plurality of first signal line groups, the first signal line group including at least two first signal lines; a plurality of second signal lines, the first signal lines and the second signal lines intersecting with each other; and a control electrode disposed in an area surrounded by two adjacent first signal lines and two adjacent second signal lines, the first signal lines and the second signal lines being configured to jointly provide control signals to the control electrode. The first signal lines in the first signal line group are electrically connected with each other.

Abstract: A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.

Abstract: A liquid crystal writing screen, including: first substrate and second substrates, and a bistable liquid crystal layer between the first and second substrates, where the first substrate includes: a first base substrate; a plurality of pixel units on a side of the first base substrate proximate to the second substrate, each pixel unit including a thin film transistor, and a pixel electrode electrically connected to a first electrode of the thin film transistor; a passivation layer on a side of the thin film transistor distal from the first base substrate and in contact with the thin film transistor; where the pixel electrode is between the first base substrate and the passivation layer; and a spacer on a side of the passivation layer distal from the first base substrate and in contact with the passivation layer. A method for preparing the liquid crystal writing screen is further provided.

Abstract: A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.

Abstract: A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.

Abstract: The embodiment of the present disclosure provides a display substrate including a plurality of gate lines and a plurality of data lines. The plurality of gate lines each extend along a first direction, and the plurality of data lines each extend along a second direction. The plurality of data lines are spatially crossed with the plurality of gate lines to define a plurality of pixel regions, and at least one sub-pixel is provided in each of the plurality of pixel regions. At least three sub-pixels adjacent to each other along the second direction form one of a plurality of pixels. All the sub-pixels within one of the plurality of pixels are coupled to a same data line of the plurality of data lines.

Abstract: An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.