Abstract: The present application provides a display apparatus having a display area and a black matrix area surrounding the display area. The display apparatus includes a first display substrate and a second display substrate opposite to each other and assembled together. The first display substrate includes a first base substrate, and a black matrix on the first base substrate and in the black matrix area. The second display substrate includes a second base substrate, and an array of a plurality of thin film transistors on the second base substrate for driving image display in the display apparatus. The black matrix has a serrated edge surrounding the display area.

Abstract: The present disclosure provides a display panel and a fabrication method thereof and a display device. The display panel includes a first substrate and a second substrate, which are aligned and assembled to form a cell, and a sealant sandwiched between the first substrate and the second substrate, wherein a hollow structure is arranged in at least one of a first surface layer of the first substrate facing the second substrate and a second surface layer of the second substrate facing the first substrate, and wherein a portion of the sealant is embedded in the hollow structure.

Abstract: An array substrate, a method for manufacturing the same, and a display apparatus are provided. The array substrate includes multiple pixel units defined by crossed gate lines and data lines, and each unit includes a pixel electrode and a thin film transistor. The array substrate further includes repairing units corresponding to target pixel electrodes in the pixel electrodes, where each repairing unit is connected to a corresponding target pixel electrode and a corresponding target signal line, and is configured to control the target pixel electrode connected to the repairing unit to be electrically connected to or insulated from the target signal line connected to the repairing unit.

Abstract: A pixel structure includes a plate electrode, an interlayer insulating layer and strip electrodes which are sequentially arranged on a substrate. The strip electrodes include first strip electrode(s), second strip electrode(s) and third strip electrode(s). The first strip electrode(s) and the plate electrode are oppositely arranged, so that an orthographic projection of the first strip electrode(s) on the substrate at least partially overlaps with an orthographic projection of the plate electrode on the substrate. The first strip electrode(s) and the plate electrode are configured to be applied with different voltages during display.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a plurality of pixel groups located on the base substrate and a first shading portion located between the plurality of pixel groups and the base substrate. Each of the plurality of pixel groups includes two pixel units, each of the plurality of pixel groups includes two opaque first common electrode strips and a second common electrode strip located between the two opaque first common electrode strips, an orthogonal projection of a space between the two opaque first common electrode strips on the base substrate falls within an orthogonal projection of the first shading portion on the base substrate.

Abstract: An array substrate is disclosed. The array substrate has a display area and a non-display area in the periphery of the display area, and includes a plurality of gate lines to which gate pulse signals are provided; a plurality of data lines to which data signals are provided, wherein signals on adjacent ones of the plurality of data lines have opposite polarities; a charge sharing device includes a first thin film transistor in the non-display area, a first terminal of the first thin film transistor being connected to one of two adjacent data lines among the plurality of data lines, a second terminal thereof being connected the other of the two adjacent data lines, and a gate thereof being configured to be provided with a first control signal in a blank time period between adjacent data frames so as to turn on the first thin film transistor.

Abstract: An array substrate, a method for manufacturing the same, and a display apparatus are provided. The array substrate includes multiple pixel units defined by crossed gate lines and data lines, and each unit includes a pixel electrode and a thin film transistor. The array substrate further includes repairing units corresponding to target pixel electrodes in the pixel electrodes, where each repairing unit is connected to a corresponding target pixel electrode and a corresponding target signal line, and is configured to control the target pixel electrode connected to the repairing unit to be electrically connected to or insulated from the target signal line connected to the repairing unit.

Abstract: An array substrate is disclosed. The array substrate has a display area and a non-display area in the periphery of the display area, and includes a plurality of gate lines to which gate pulse signals are provided; a plurality of data lines to which data signals are provided, wherein signals on adjacent ones of the plurality of data lines have opposite polarities; a charge sharing device includes a first thin film transistor in the non-display area, a first terminal of the first thin film transistor being connected to one of two adjacent data lines among the plurality of data lines, a second terminal thereof being connected the other of the two adjacent data lines, and a gate thereof being configured to be provided with a first control signal in a blank time period between adjacent data frames so as to turn on the first thin film transistor.

Abstract: A thin film transistor comprises a gate, a gate insulating layer, an active layer, a source electrode and a drain electrode. The drain electrode comprises a first sub-drain electrode and at least one second sub-drain electrode. A first portion of the active layer between the first sub-drain electrode and the source electrode and a second portion of the active layer between each of the at least one second sub-drain electrode and the source electrode are used for forming different portions of a primary channel, respectively. The first sub-drain electrode is a signal input electrode, and a third portion of the active layer between the first sub-drain electrode and each of the at least one second sub-drain electrode is used for forming an auxiliary channel. A channel length of the auxiliary channel is less than or equal to a channel length of the primary channel.

Abstract: The present application provides a display apparatus having a display area and a black matrix area surrounding the display area. The display apparatus includes a first display substrate and a second display substrate opposite to each other and assembled together. The first display substrate includes a first base substrate, and a black matrix on the first base substrate and in the black matrix area. The second display substrate includes a second base substrate, and an array of a plurality of thin film transistors on the second base substrate for driving image display in the display apparatus. The black matrix has a serrated edge surrounding the display area.

Abstract: A pixel structure includes a plate electrode, an interlayer insulating layer and strip electrodes which are sequentially arranged on a substrate. The strip electrodes include first strip electrode(s), second strip electrode(s) and third strip electrode(s). The first strip electrode(s) and the plate electrode are oppositely arranged, so that an orthographic projection of the first strip electrode(s) on the substrate at least partially overlaps with an orthographic projection of the plate electrode on the substrate. The first strip electrode(s) and the plate electrode are configured to be applied with different voltages during display.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming an insulation layer on a base substrate, the base substrate including a display area and a peripheral area; and forming a planarization film on the insulation layer; performing a patterning process to the planarization film to form a planarization layer with a first thickness in the display area, a planarization layer with a second thickness in the peripheral area, and a first via hole in the planarization layer with the second thickness, the second thickness being less than the first thickness, and performing an etching process on the peripheral area to thin or remove the planarization layer is with the second thickness, and forming a second via hole corresponding to the first via hole in the insulation layer.

Abstract: An array substrate and a maintenance method therefor, and a display apparatus are provided. The array substrate includes: a plurality of data signal lines, wherein each of the data signal lines includes a plurality of data signal line sub-segments corresponding to a plurality of pixel units on a one-to-one basis, and each of the pixel units includes a light-shielding metal strip, wherein an orthographic projection of an input end of the data signal line sub-segment on a base substrate and an orthographic projection of the light-shielding metal strip on the base substrate have a first overlapping region used as a first maintenance site, and an orthographic projection of an output end of the data signal line sub-segment on the base substrate and an orthographic projection of the light-shielding metal strip on the base substrate have a second overlapping region used as a second maintenance site.

Abstract: An array substrate, a method of manufacturing the same, and a display device are provided. The array substrate includes a base substrate; a plurality of thin film transistors on the base substrate; and a plurality of light shielding layers on a side of the plurality of thin film transistors facing away from the base substrate, each thin film transistor includes an active layer, at least a portion of the active layer serves as a channel of the thin film transistor, and an orthogonal projection of each of the light shielding layers on the base substrate at least partially overlaps an orthogonal projection of the channel of one of the plurality of thin film transistors on the base substrate.

Abstract: The array substrate comprises a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction crossing the first direction, and a plurality of pixel units arranged as an array. Each of the plurality of data lines is arranged between two columns of pixel units, the two columns of the pixel units extending in the second direction and being adjacent to each other in the first direction, and the data line is connected to pixel units at one side of said data line or to pixel units at the other side of said data line. Each of the plurality of data lines switches the direction of connection from one side to the other in an alternating manner with each two adjacent rows of pixel units, and the plurality of data lines have the same connection direction in each row of pixel units.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming an insulation layer on a base substrate, the base substrate including a display area and a peripheral area and forming a planarization film on the insulation layer; performing a patterning process to the planarization film to form a planarization layer with a first thickness in the display area, a planarization layer with a second thickness in the peripheral area, and a first via hole in the planarization layer with the second thickness, the second thickness being less than the first thickness, and performing an etching process on the peripheral area to thin or remove the planarization layer is with the second thickness, and forming a second via hole corresponding to the first via hole in the insulation layer.

Abstract: The disclosure discloses a thin film transistor and a manufacturing method therefor, an array substrate, and a displaying device. The TFT includes a first electrode comprising strip arms and a connecting arm connected with the strip arms, a second electrode comprising a strip arm, an active layer, a gate, and a gate insulation layer. The strip arms are arranged sequentially in a first direction which is perpendicular to the extending direction of the strip arms. The projection of the connecting arm of the first electrode on the gate does not have an overlapped region with the gate. A region between this connecting arm and the strip arms of the second electrode is a first region. The orthogonal projection of the active layer on the first electrode or the second electrode has a portion within the first region which is at least partially hollowed-out.

Abstract: The present disclosure provides a display panel and a fabrication method thereof and a display device. The display panel includes a first substrate and a second substrate, which are aligned and assembled to form a cell, and a sealant sandwiched between the first substrate and the second substrate, wherein a hollow structure is arranged in at least one of a first surface layer of the first substrate facing the second substrate and a second surface layer of the second substrate facing the first substrate, and wherein a portion of the sealant is embedded in the hollow structure.

Abstract: A thin film transistor comprises a gate, a gate insulating layer, an active layer, a source electrode and a drain electrode. The drain electrode comprises a first sub-drain electrode and at least one second sub-drain electrode. A first portion of the active layer between the first sub-drain electrode and the source electrode and a second portion of the active layer between each of the at least one second sub-drain electrode and the source electrode are used for forming different portions of a primary channel, respectively. The first sub-drain electrode is a signal input electrode, and a third portion of the active layer between the first sub-drain electrode and each of the at least one second sub-drain electrode is used for forming an auxiliary channel. A channel length of the auxiliary channel is less than or equal to a channel length of the primary channel.