Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.

Abstract: The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure according to the present invention, by adjusting the parameter of etching as manufacturing the gate, the angular surfaces are formed at the two sides of the gate, and the gate is used to be a mask to implement ion implantation to the polysilicon layer to form the n-type heavy doping area and the n-type light doping area are formed at the polysilicon layer at the same time. In the TFT structure according to the present invention, the polysilicon layer comprises n-type heavy doping areas at two sides and n-type light doping areas between the channel area of the polysilicon layer and the n-type heavy doping areas.

Abstract: The present invention provides a pixel structure, comprising scan lines, data lines and pixel areas, and the scan lines are separately arranged in parallel along a horizontal direction, and the data lines are separately arranged in parallel along a vertical direction, and the scan lines and the data lines overlap with each other to form the pixel areas, and the pixel structure further comprises a connection electrode employed to coupled to pixel areas, and the connection electrode comprises a first connection layer and a second connection layer, and the first connection layer is in the same pattern layer with the scan lines and intersects with the scan lines, and the first connection layer at an intersecting position with the scan line is disconnected, and the second connection layer is in the same pattern layer with the data lines and crosses with the scan lines.

Abstract: A method of manufacturing an array substrate is disclosed. A first conductive pattern, a first insulating layer, a second conductive pattern, and a second insulating layer on a base substrate is successively formed. The second insulating layer and the first insulating layer are patterned with a double-tone mask. At least a half lap joint via hole in the second insulating layer, and at least a full lap joint via hole in both the first insulating layer and the second insulating layer is formed. The second conductive pattern corresponds to a part of the half lap joint via hole, and the first conductive pattern corresponds to the whole of the full lap joint via hole. A third conductivity pattern is formed on the surface of the second conductivity pattern and the first insulating layer and a fourth conductive pattern is formed on the surface of the first conductive pattern.

Abstract: A method of manufacturing an array substrate is disclosed. A first conductive pattern, a first insulating layer, a second conductive pattern, and a second insulating layer on a base substrate is successively formed. The second insulating layer and the first insulating layer are patterned with a double-tone mask. At least a half lap joint via hole in the second insulating layer, and at least a full lap joint via hole in both the first insulating layer and the second insulating layer is formed. The second conductive pattern corresponds to a part of the half lap joint via hole, and the first conductive pattern corresponds to the whole of the full lap joint via hole. A third conductivity pattern is formed on the surface of the second conductivity pattern and the first insulating layer and a fourth conductive pattern is formed on the surface of the first conductive pattern.

Abstract: Disclosed are an array substrate and a display device which belong to the technical field of displays, and solve the technical problem that, in the existing in-cell technology, the manufacturing process of array substrates is too complex. The array substrate comprises a plurality of pixel units each having a thin film transistor, a plurality of common electrodes, and a plurality of address lines. The address lines each are formed by connecting a first metal wire and a second metal wire, the first metal wire being located at a same layer as a gate of the thin film transistor, and the second metal wire being located at a same layer as a source and a drain of the thin film transistor.

Abstract: A liquid crystal display (LCD) substrate, comprising: at least one pattern region; and a cutting region around the at least one pattern region, wherein a piezoelectric thin film is formed in the cutting region, and each end of the piezoelectric thin film is connected with a lead.

Abstract: The disclosure provides a liquid crystal panel and a liquid crystal display. The liquid crystal panel comprises a first substrate, a second substrate, a liquid crystal layer and a light blocking layer. The second substrate is disposed opposite to the first substrate. The liquid crystal layer is clamped between the first substrate and the second substrate. The light blocking layer is disposed at the first substrate. The light blocking layer is disposed at the narrow frame of the non-display section for preventing light leaking from the edge of the liquid crystal panel. Therefore, the disclosure can prevent light leaking from the edge of the liquid crystal panel so that the visual quality is improved.

Abstract: A method for detecting a pattern offset amount of exposed regions comprises forming at least one pair of conductive detecting marks with a predetermined position relationship by a patterning process including two exposing processes; detecting an electrical characteristic of the at least one pair conductive detecting marks, if the detected electrical characteristic does not meet a predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is not qualified; and if the detected electrical characteristic meets the predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is qualified.

Abstract: A mask plate comprises a light transmitting region; a light absorbing region; and a light reflecting region provided in the light absorbing region on one side of the mask plate. An exposing method using the mask plate comprises placing a first substrate coated with a first photosensitive resist layer under and parallel to the mask plate; having first light vertically strike on an upper surface of the mask plate from above, pass through the light transmitting region of the mask plate, and strike on the first photosensitive resist layer; placing a second substrate coated with a second photosensitive resist layer under and parallel to the mask plate; and having second light reflected by the lens device onto the surface of the mask plate where the light reflecting region is provided, then reflected by the light reflecting region and strike on the second photosensitive resist layer.

Abstract: An array substrate comprises a first metal layer in which first signal lines are disposed; a second metal layer in which second signal lines are disposed; an insulation layer provided between the first and second metal layers. A repairing line is provided in edge regions of the second metal layer and insulated from the second signal lines, and the repairing line comprises a first longitudinal portion, a second longitudinal portion and a transverse portion, the first longitudinal portion is electrically connected to the second longitudinal portion by the transverse portion. A projection of the first longitudinal portion in a plane of the first metal layer intersects with one end of each of the first signal lines, and a projection of the second longitudinal portion in the plane of the first metal layer intersects with the other end of each of the first signal lines.

Abstract: A touch display comprises a color filter substrate, an array substrate opposite to the color filter via a plurality of spacers and a voltage detection circuit. The color filter substrate comprises an upper substrate and a common electrode formed on the upper substrate, and the array substrate comprises a lower substrate and a gate line, a data line and a pixel electrode formed on the lower substrate. The plurality of spacers comprise a first spacer formed between the gate line and the common electrode and a second spacer formed between the data line and the common electrode , which are capable of electrically connecting the common electrode with the gate line and the data line respectively under an external pressure more than a threshold value. The voltage detection circuit is connected with the gate line and the data line so as to detect whether the voltage on the gate line and the voltage on the data line become equal to the voltage of the common electrode.

Abstract: A touch display comprises a color filter substrate, an array substrate opposite to the color filter via a plurality of spacers and a voltage detection circuit. The color filter substrate comprises an upper substrate and a common electrode formed on the upper substrate, and the array substrate comprises a lower substrate and a gate line, a data line and a pixel electrode formed on the lower substrate. The plurality of spacers comprise a first spacer formed between the gate line and the common electrode and a second spacer formed between the data line and the common electrode, which are capable of electrically connecting the common electrode with the gate line and the data line respectively under an external pressure more than a threshold value. The voltage detection circuit is connected with the gate line and the data line so as to detect whether the voltage on the gate line and the voltage on the data line become equal to the voltage of the common electrode.

Abstract: The present invention discloses a mask pattern transferring device and a method of preparing a mask pattern transferring device. The mask pattern transferring device comprises: a magnetization head disposed on a magnetization head carrying device, for magnetizing composite powders each comprising a core of ferromagnetic metal and an outer resin film; a rotary roller formed of a non-ferromagnetic material, for adsorbing the composite powders magnetized by the magnetization head; a demagnetization head disposed at a downstream of the magnetization head in the rotating direction of the rotary roller, for demagnetizing the magnetized composite powders adsorbed by the rotary roller; and a collecting container, the outer edge of which is tangent with one side of the rotary roller, and which is disposed at the downstream of the magnetization head along the periphery of the rotary roller to collect the demagnetized composite powders.

Abstract: A method for detecting a pattern offset amount of exposed regions comprises forming at least one pair of conductive detecting marks with a predetermined position relationship by a patterning process including two exposing processes; detecting an electrical characteristic of the at least one pair conductive detecting marks, if the detected electrical characteristic does not meet a predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is not qualified; and if the detected electrical characteristic meets the predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is qualified.

Abstract: A method for detecting a patter offset amount of exposed regions comprises forming at least one pair of conductive detecting marks with a predetermined position relationship by a patterning process including two exposing processes; detecting an electrical characteristic of the at least one pair conductive detecting marks, if the detected electrical characteristic does not meet a predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is not qualified; and if the detected electrical characteristic meets the predetermined position relationship, it is determined that the pattern offset amount of the exposed regions in two exposure steps is qualified.

Abstract: An embodiment of the disclosed technology provides a method for preventing electrostatic breakdown during the manufacturing process of the array substrate. The method comprises: when forming a conductive pattern of a substrate, connecting conductive lines for forming the conductive pattern with a closed conductive ring on a same layer as the conductive lines in a peripheral region of the substrate, and wherein when electrostatic charges are generated over the metal line, the electrostatic charges are led to the closed conductive ring.

Abstract: A TFT-LCD array substrate, a manufacturing method thereof and a liquid crystal display panel are provided in the invention. The TFT-LCD array substrate comprises a plurality of first gate lines and a plurality of first data lines, and a plurality of pixel regions are defined by intersecting the first gate lines and the first data lines with each other. A first pixel electrode and a first TFT are formed in each of the pixel regions, and a second TFT and a second pixel electrode are further comprised in each of the pixel regions. The second TFT is connected with the second pixel electrode, the first pixel electrode and the second pixel electrode form the voltage difference to drive the reversion of the liquid crystal molecules, and the first TFT and the second TFT are turned on or off simultaneously.

Abstract: Projection apparatus for projecting a radiation spot on a working plane includes a plurality of stacks of diode-laser bars. Each stack provides a beam of laser radiation. The diode-laser bars in each stack are arranged one above another in the fast-axis direction of the diode-laser bars. A corresponding plurality of beam-expanders expands the beam from the corresponding diode-laser bar stack in the slow-axis direction of the diode laser bars only. A focusing lens collects the slow-axis expanded beams and projects the slow-axis expanded beams into the working plane to form the radiation spot.

Abstract: An embodiment provides a thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a substrate and multilayer array patterns formed on the substrate, and a detecting mark, which is used to detect the size or alignment deviation of one array pattern among the multilayer array patterns and provided in a region of the substrate where the multilayer array patterns are not provided. The detecting mark comprises a detecting area and a detecting pattern which is provided in the same layer as the array pattern to be detected, the detecting pattern is located within the detecting area, and the detecting pattern has transmissivity or reflectivity different from that of the remaining area in the detecting area other than the detecting pattern.