Abstract: A power supply circuit and a related apparatus, used in the field of terminal technologies, are provided. The power supply circuit includes: an EIS module connected to a battery, a controller, and a power management module. The EIS module is connected to the controller, and the controller is connected to the power management module. The EIS module may detect an internal resistance of the battery and transmit the internal resistance of the battery to the controller. The controller may obtain a charge cutoff voltage and/or a charge cutoff current of the battery according to the internal resistance of the battery, and send a first control signal to the power management module. The power management module may control the charge cutoff voltage and/or the charge cutoff current of the battery according to the first control signal.

Abstract: Methods, systems, and devices for complete and incomplete superblock generation are described. A memory system may be configured to generate and access complete and incomplete superblocks by replacing invalid physical blocks with valid physical blocks from a same plane. For example, he memory system may perform a scan to determine (e.g., identify) which blocks are valid, invalid, or both. The memory system may replace invalid blocks from superblocks having a relatively small quantity of invalid blocks with blocks (e.g., blocks from a same plane) from superblocks having a relatively large quantity of invalid blocks, which may result in the generation of complete and incomplete superblocks.

Abstract: Disclosed are method for recommending a resource list, a terminal device, and a server. The method may include: acquiring current running information in response to detecting that the interface is invoked; inputting the running information into the local recommendation model to obtain recommendation probabilities of resources in the resource list; and selecting a to-be-recommended resource according to the recommendation probabilities and displaying the to-be-recommended resource.

Abstract: Provided are a refreshing method and a display apparatus. The method includes: presenting a video on a display of the display apparatus; detecting whether a content type of the video is switched from a first content type to a second content type; obtaining first picture quality parameter information matching the second content type from preset data of the display apparatus, wherein the preset data includes a predefined relation between a content type and picture quality parameter information, updating the parameter of the at least one picture quality setting option in the picture mode settings menu according to the first picture quality parameter information, and presenting the second section of the video according to the updated parameter of the at least one picture quality setting option in the picture mode settings menu.

Abstract: Method, system and apparatus for securely sharing audio-video data based on full anonymous privacy. The system encapsulates the original audio-video data and uses an obfuscation algorithm to protect service information, such that the requirements of audio-video data sharing are met, and the privacy of data is increased; meanwhile, determines shareable audio-video data by calculating the intersection of the obfuscation sets, such that the accuracy of data access is ensured. In addition, the system further uses an encryption algorithm to protect an identity and permission of a recipient, categorizing information and grading information, only sends data that the data recipient has permission for, improving security and reducing system resources. The system the requirements of audio-video data sharing and protects the privacy and security of the audio-video data, prevents the leakage of sensitive information, and thus improves the security of audio-video data sharing.

Abstract: Methods, systems, and devices for validity mapping techniques are described. A memory device may use a change log to update a mapping that indicates whether data stored at respective physical addresses is valid. For example, the memory device may receive a command associated with data having a corresponding set of addresses (whether logical block addresses or physical addresses). The memory device may set an entry of the change log based on whether the set of addresses are consecutive. For example, the memory device may identify whether the set of addresses are consecutive and may set a flag in the entry of the change log to indicate whether the addresses are consecutive. Then, the memory device may update one or more entries of the mapping corresponding to the entry of the change log to indicate whether the addresses corresponding to the one or more entries of the mapping store valid data.

Abstract: Disclosed are a switching method for an audio output channel, and a display apparatus. The method includes: in response to a switch operation for switching an audio output channel of an external power amplifier, obtaining a first state value corresponding to the switch operation, where the audio output channel of the external power amplifier includes an ARC and/or an eARC, and the first state value is used for indicating an on/off state of the eARC specified by the switch operation; and adjusting a connection state of the ARC and a connection state of the eARC according to the first state value, and determining a target channel for outputting audio according to an adjusting result; and displaying the on/off state of the eARC matching with the target channel.

Abstract: Method, system and apparatus for securely sharing audio-video data based on full anonymous privacy. The system encapsulates the original audio-video data and uses an obfuscation algorithm to protect service information, such that the requirements of audio-video data sharing are met, and the privacy of data is increased; meanwhile, determines shareable audio-video data by calculating the intersection of the obfuscation sets, such that the accuracy of data access is ensured. In addition, the system further uses an encryption algorithm to protect an identity and permission of a recipient, categorizing information and grading information, only sends data that the data recipient has permission for, improving security and reducing system resources. The system the requirements of audio-video data sharing and protects the privacy and security of the audio-video data, prevents the leakage of sensitive information, and thus improves the security of audio-video data sharing.

Abstract: A power head of a directional drill includes a main motor, gearbox, main shaft, active drill pipe, and water swivel. The gearbox has a driving shaft connected to the main motor and engaged with the main shaft via a gear. One end of the main shaft is fixedly connected to the active drill pipe, while the other end of the driving shaft links to an angle adjuster through the gearbox, enabling efficient toolface adjustment and braking of the main motor. The water swivel mandrel connects to the active drill pipe via a connecting shaft with an axial floating structure. A connecting sleeve near the water swivel forms a hexagonal sleeve sliding pair with the connecting shaft, preventing axial impacts on mandrel support bearings during drilling. This design enhances the service life of the bearings and reduces equipment repairs, improving the reliability and efficiency of the drilling process.

Abstract: The embodiments of the present disclosure provide a neural network model structure determining method and apparatus, a device, a medium and a product. The neural network model structure determining method includes: determining, based on a preset neural network model architecture search algorithm, at least one candidate neural network model; predicting, based on a preset Central Processing Unit (CPU) utilization prediction model, a runtime CPU utilization for each candidate neural network model, so as to obtain a predicted value of CPU utilization; and determining, based on at least one predicted value of CPU utilization, a target neural network model structure among structures of the at least one candidate neural network model.

Abstract: VSG Frequency Control Method, Device and Storage Medium based on Power Correction, belonging to the field of power electronics technology, which addresses the problem of suppressing VSG output power oscillations. The technical solution of the present application corrects the output power Pe(s) and feeds the corrected value back to the control loop to suppress power oscillations. The transfer function of the power correction stage G(s) is flexible and can be configured with appropriate parameters according to the system's inherent phase margin. Additionally, principles for selecting the parameters of the correction coefficients ?1 and ?2 are also provided. The adjustment coefficients of the power correction stage, the values of ?1 and ?2 do not affect the effect of the steady-state gain during the transient process. The present application can not only suppress VSG output power oscillations, but also provide a larger inertial support, thereby improving the stability of the VSG system.

Abstract: A power head of a directional drill includes a main motor, gearbox, main shaft, active drill pipe, and water swivel. The gearbox has a driving shaft connected to the main motor and engaged with the main shaft via a gear. One end of the main shaft is fixedly connected to the active drill pipe, while the other end of the driving shaft links to an angle adjuster through the gearbox, enabling efficient toolface adjustment and braking of the main motor. The water swivel mandrel connects to the active drill pipe via a connecting shaft with an axial floating structure. A connecting sleeve near the water swivel forms a hexagonal sleeve sliding pair with the connecting shaft, preventing axial impacts on mandrel support bearings during drilling. This design enhances the service life of the bearings and reduces equipment repairs, improving the reliability and efficiency of the drilling process.

Abstract: The present invention belongs to the technical field of coal mine drills, and relates to a coal mine automatic directional drill, comprising a moving platform, a machine frame, a clamper, a main manipulator, a power head, a drill pipe storage system, a control system and a hydraulic system. In the present invention, a structure of the power head is improved, an angle adjuster is arranged on one side of a gearbox away from a main motor, and a transmission shaft in the angle adjuster is circumferentially and fixedly connected with a driving shaft, thus a toolface azimuth is adjusted accurately and efficiently and a structure of a rotary brake device of the main motor is simplified by the angle adjuster which has functions of accurate angle adjustment, locking and anti-rotation.

Abstract: A system includes a memory device comprising an array of memory cells coupled with a plurality of page buffers. At least a portion of the array is configured as single-level cell memory. A processing device is coupled to the memory device and includes cache. The processing device detects demand for the cache during a memory operation requiring access to the single-level cell memory. Detecting the demand can include determining an amount of metadata required to be accessed or updated based on a type of the memory operation. The processing device causes, based on the demand, the metadata associated with the memory operation to be moved from one of the cache or the array of memory cells to one or more page buffers of the plurality of page buffers.

Abstract: Methods, systems, and devices for address conversion table supporting hardware automation are described. A memory system may implement a hardware logic block to perform the conversion of a logical page address to a physical device address. The hardware logic block may include a set of one or more tables for address conversion, including a page mapping table, a page type change point table, and a virtual block table, which may support performing the conversion of the logical page address to a physical device address using hardware logic. To account for varying parameters of the memory system, the firmware may load one or more parameters for the hardware logic block, for example, during initialization of the memory system. As such, the hardware logic block may support converting logical page addresses to physical device addresses for various different memory systems and memory system configurations.

Abstract: A memory sub-system includes a memory device comprising a memory array comprising a plurality of planes a processing device configured to detect a boot process of the system subsequent to an occurrence of a power loss event, and initiate a series of multi-plane read operations to identify a last written page of the memory device, wherein the last written page was programmed prior to the occurrence of the power loss event, and wherein at least a portion of the memory device remains unprogrammed.

Abstract: An anti-interference module and a terminal device are provided. The anti-interference module includes a circuit board, an interfering source, a device disposing space, and an anti-interference component. The interfering source is disposed on the circuit board, where the interfering source may generate a changing interference magnetic field; the device disposing space is provided on a side of the circuit board and is used to dispose an electronic device with a first coil; and the anti-interference component is configured to generate a compensation magnetic field that overlaps the interference magnetic field, or to consume electric energy generated by coupling between the interference magnetic field and the anti-interference component to reduce magnetic induction intensity of the device disposing space. This application may be applied to the terminal device such as a mobile phone.

Abstract: Methods, systems, and devices for unmap backlog in a memory system are described. A memory system may be configured to support receiving an unmap command from a host system and signaling, to the host system, an indication that the unmap command has been processed (e.g., handled, acknowledged). In response to the unmap command, the memory system may proceed with various unmap operations, which may include unmapping at least some of the associated addresses after indicating that the unmap command has been processed. For example, a memory system may implement an unmap backlog table to identify sections of addresses that are to be unmapped (e.g., after indicating that the unmap command has been processed). In some examples, the memory system may support various aspects of prioritization between unmap operations (e.g., background unmap operations) and other access operations such as read operations, write operations, or other access operations.