Patents by Inventor Xing Wang
Xing Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250139658Abstract: A splash advertisement display method and a related device are provided. The method includes: A terminal device displays a splash advertisement; the terminal device detects a first operation of a user, where the first operation is an operation of clicking a preset area; and the terminal device displays a first interface of a first application, where the first interface includes a first advertisement, and content of the first advertisement is related to content of the splash advertisement.Type: ApplicationFiled: October 17, 2022Publication date: May 1, 2025Inventors: Zonglu ZHU, Youqi JIN, Xing WANG, Ming JIANG
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Patent number: 12271870Abstract: Placing an event into a particular cluster can allow various inferences about the event. A new payment transaction that looks similar to a previously identified cluster of mostly fraudulent payment transactions, for example, may be higher risk. The present disclosure includes structural data improvements to the way that online clustering of events (which may include web events and not just payment transactions) occurs. A new event can be classified into a particular segment very quickly using feature table searching, which can allow for better decision making when a short timeframe is required (e.g. transaction processing, online advertising, etc.).Type: GrantFiled: November 16, 2022Date of Patent: April 8, 2025Assignee: PAYPAL, INC.Inventors: Avishay Meron, Xing Wang, Adam Cohen, Chunmao Ran, David Stein
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Patent number: 12265710Abstract: Methods, systems, and devices for memory management procedures for write boost mode are described. A memory system may receive a command to write data. The memory system may write the data to a first location of the memory system using a first mode for storing one bit per memory cell based on receiving the command. The memory system may select a first portion of the data to rewrite to the memory system using a second mode for storing two or more bits per memory cell based on one or more parameters satisfying one or more thresholds. The memory system may write the first portion of the data to a second location of the memory system using the second mode based on selecting the first portion of the data. The memory system may maintain a second portion of the data at the first location of the memory system.Type: GrantFiled: March 16, 2021Date of Patent: April 1, 2025Assignee: Micron Technology, Inc.Inventors: Xing Wang, Zhen Gu, Xu Zhang, Liping Xu
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Publication number: 20250103224Abstract: A memory system includes a memory device including memory cells, and a memory controller coupled to the memory device. A memory cell is configured to be programmed to one of a first state and a second state. The first state corresponds to a first bit, and the second state corresponds to a second bit. The memory controller is configured to receive first data including bits, the bits of the first data including the first bit and the second bit, in response to a second number of the second bit in the first data being larger than a first number of the first bit in the first data, perform a first flipping operation to the first data to obtain a second data including the bits, and store the second data to the memory device.Type: ApplicationFiled: November 13, 2024Publication date: March 27, 2025Inventors: Hua TAN, Xing WANG, Yaolong GAO, Fanya BI, Zhe SUN, Bo YU
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Patent number: 12260094Abstract: The present disclosure provides a memory system with a non-volatile memory that includes a plurality of storage areas. Each storage may include a plurality of first storage groups in a first area and a plurality of second storage groups in a second area. The first area may support physical addressing. The second area may not support physical addressing. A memory controller of the memory system may perform a wear leveling process by swapping a first storage group having a first group write count with a second storage group having a second group write count. The first group write count may be a maximum group write count among a plurality of group write counts corresponding to the plurality of first storage groups. The second group write count may be a minimum group write count among a plurality of group write counts corresponding to the plurality of second storage groups.Type: GrantFiled: November 20, 2023Date of Patent: March 25, 2025Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Fanya Bi, Xing Wang, Hua Tan, Zhe Sun, Bo Yu, Guangyao Han
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Publication number: 20250093285Abstract: Provided is a subcellular self-tracer ion imaging and localization method of metal elements. Wherein, the above method includes: using the SEM-FIB-TOF-SIMS system to perform subcellular structure imaging and metal ion imaging on the sample slice, wherein in the SEM-FIB-TOF-SIMS system, the scanning electron microscope (SEM) is used to perform subcellular structure imaging on the sample slice; and the focused ion beam (FIB) is used to perform surface bombardment on the subcellular structures, and the secondary ions excited are detected by the time-of-flight secondary ion mass spectrometry (TOF-SIMS) to obtain the ion information in the analysis area and imaged.Type: ApplicationFiled: December 3, 2024Publication date: March 20, 2025Applicant: Shandong Laboratory of Advanced Agricultural Sciences in WeifangInventors: Xiaohua HUANG, Xing Wang DENG, Mengzhu CHENG, Jun ZHAO, Bin XU
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Patent number: 12255981Abstract: The present disclosure provides methods and apparatuses for implementing high-speed cryptographic operations based on software-hardware collaboration, and electronic devices. In the embodiments of the present disclosure, by analyzing software and hardware computing resources in real-time, the cryptographic device driver allocates the one or more target resources for cryptographic computation to the reference data packets. When the one or more target resources include the target cryptographic device, the cryptographic device executes, according to the characteristics of the target cryptographic algorithm used to perform cryptographic computation on the reference data packet, the acceleration operation corresponding to the target cryptographic algorithm for the cryptographic computation on the reference data packets, such as grouping the reference data packets, to improve a concurrent execution rate of an algorithm and cope with situations with a large amount of service concurrency and data processing.Type: GrantFiled: June 14, 2024Date of Patent: March 18, 2025Assignee: HANGZHOU HIKVISION DIGITAL TECHNOLOGY CO., LTD.Inventors: Bin Wang, Da Chen, Xiaohong Guan, Jiadong Chen, Wei Wang, Xing Wang
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Publication number: 20250086115Abstract: Methods, systems, and devices for validity mapping techniques are described. A memory device may use a change log to update a mapping that indicates whether data stored at respective physical addresses is valid. For example, the memory device may receive a command associated with data having a corresponding set of addresses (whether logical block addresses or physical addresses). The memory device may set an entry of the change log based on whether the set of addresses are consecutive. For example, the memory device may identify whether the set of addresses are consecutive and may set a flag in the entry of the change log to indicate whether the addresses are consecutive. Then, the memory device may update one or more entries of the mapping corresponding to the entry of the change log to indicate whether the addresses corresponding to the one or more entries of the mapping store valid data.Type: ApplicationFiled: September 16, 2024Publication date: March 13, 2025Inventors: Xing Wang, Zhen Gu, Xu Zhang, Liping Xu
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Publication number: 20250068886Abstract: Embodiments of this application disclose a method for processing a word sequence using a sequence model and apparatus, to improve a task execution effect of a sequence model. The method includes: encoding a source sequence of words of a first language by using an encoder side of the sequence model, to obtain a first encoding result and a second encoding result; inputting a target sequence of words of the first language, the first encoding result, and the second encoding result into a decoder side of the sequence model to obtain a second sequence of words of a second language, and outputting the second sequence of words in the second language.Type: ApplicationFiled: November 14, 2024Publication date: February 27, 2025Inventors: Zhaopeng TU, Jie HAO, Xing WANG, Longyue WANG
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Publication number: 20250060884Abstract: The present disclosure provides a memory system with a non-volatile memory that includes a plurality of storage areas. Each storage may include a plurality of first storage groups in a first area and a plurality of second storage groups in a second area. The first area may support physical addressing. The second area may not support physical addressing. A memory controller of the memory system may perform a wear leveling process by swapping a first storage group having a first group write count with a second storage group having a second group write count. The first group write count may be a maximum group write count among a plurality of group write counts corresponding to the plurality of first storage groups. The second group write count may be a minimum group write count among a plurality of group write counts corresponding to the plurality of second storage groups.Type: ApplicationFiled: November 20, 2023Publication date: February 20, 2025Inventors: Fanya Bi, Xing Wang, Hua Tan, Zhe Sun, Bo Yu, Guangyao Han
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Patent number: 12223153Abstract: A display panel and a mobile terminal are provided by the present disclosure, including a substrate and a conductive layer on the substrate. The conductive layer includes a plurality of touch electrodes, a plurality of leads, and a plurality of dummy electrodes, wherein each one of the leads is disposed between two adjacent ones of the touch electrodes, and each one of the dummy electrodes is disposed between one of the touch electrodes and one of the leads which are adjacent to each other. Each one of the leads is electrically connected between the corresponding touch electrode and a touch chip, and the dummy electrodes are electrically connected to neither the touch electrodes nor the leads. A shape of a grid structure of the touch electrodes, a shape of a grid structure of the leads, and a shape of a grid structure of the dummy electrodes are the same.Type: GrantFiled: September 14, 2021Date of Patent: February 11, 2025Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Xing Wang
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Patent number: 12216905Abstract: Techniques are described herein for performing a flush operation for a write booster buffer of a memory system. The flush operation may include swapping valid blocks in the write booster buffer for invalid blocks in a storage space of the memory system. After swapping the blocks, the memory system may transfer the information from a first type of blocks that were formerly assigned to the write booster buffer to a second type of blocks in the storage space. In such a flush operation, space is made available in the write booster buffer with less latency than it would take to transfer information between blocks, thereby improving the performance of the write booster mode.Type: GrantFiled: March 19, 2021Date of Patent: February 4, 2025Assignee: Micron Technology, Inc.Inventors: Xing Wang, Wenyu Li, Xiaolai Zhu, Xu Zhang
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Patent number: 12205760Abstract: This application provides a wireless charging coil, and an electronic device and an antenna that include the wireless charging coil. The wireless charging coil includes a plurality of coil groups that are at a plurality of layers and that are connected in series, and an insulation layer that is disposed between two layers of the plurality of coil groups. The wireless charging coil includes a first area and a second area that is disposed at an outer periphery of the first area. A plurality of coil groups disposed in the second area are arranged at the plurality of layers, and each coil group includes a plurality of coils wound in parallel at one layer.Type: GrantFiled: August 24, 2022Date of Patent: January 21, 2025Assignee: Honor Device Co., Ltd.Inventors: Hua Huang, Jiaxiang Song, Xialing Zhang, Xing Wang
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Publication number: 20250010327Abstract: The present application provides a coating die, a coating device and a coating method. The coating die includes a first die and a second die, the first die is connected to the second die and enclosed to form a slot to output slurry; the first die includes a die body, a lip portion and a lip adjustment assembly; the lip portion is connected to the die body and is located at a discharge end of the slot; the lip adjustment assembly is used for adjusting a temperature of the lip portion to control a deformation of the lip portion. The solution of the present application can improve the consistency of coating.Type: ApplicationFiled: September 26, 2024Publication date: January 9, 2025Inventors: Xing WANG, Hongwu SHANG, Tuo ZHENG, Shisong LI, Xiaokang YAN, Xiaoliang GAO, Huan CHE, Xuefeng KANG
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Patent number: 12186831Abstract: The present application provides a welding assembly and a battery module. The welding assembly includes: a first weldment; and a second weldment, welded and fixed with the first weldment to form a welding seam; where, at least one side of the welding seam is provided with an exhaust channel; and the exhaust channel is located between the first weldment and the second weldment. In the present application, an exhaust gas generated during welding can be discharged from the exhaust channel to prevent it from entering the welding seam to reduce the strength of the welding seam.Type: GrantFiled: July 29, 2021Date of Patent: January 7, 2025Assignee: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITEDInventors: Guofeng Liu, Anwei Wu, Xing Wang, Lei Wang, Bin Zhao, Linshan Wu
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Patent number: 12181926Abstract: A support apparatus is configured to fasten a stylus, a magnet of the stylus includes a first wall surface and a second wall surface facing away from the first wall surface, and a polarity of the first wall surface is opposite to that of the second wall surface. The support apparatus includes a main body, a support frame, a connecting part, and a stylus fastener; the stylus fastener includes an annular body and a mounting space formed by the body, the body is magnetic and includes an inner wall surface and an outer wall surface, and a polarity of the inner wall surface is opposite to that of the outer wall surface; the stylus is configured to mount in the mounting space.Type: GrantFiled: August 29, 2022Date of Patent: December 31, 2024Assignee: HONOR DEVICE CO., LTD.Inventors: Xing Wang, Haojie Li
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Patent number: 12182684Abstract: Embodiments of this application disclose a sequence model processing method and apparatus, to improve a task execution effect of a sequence model. The method includes: inputting a source sequence into an encoder side of a sequence model, the encoder side including a self-attention encoder and a temporal encoder; encoding the source sequence by using the temporal encoder, to obtain a first encoding result, the first encoding result including time series information obtained by performing time series modeling on the source sequence; and encoding the source sequence by using the self-attention encoder, to obtain a second encoding result; inputting a target sequence, the first encoding result, and the second encoding result into a decoder side of the sequence model; and decoding the target sequence, the first encoding result, and the second encoding result by using the decoder side, and outputting a decoding result obtained after the decoding.Type: GrantFiled: February 22, 2021Date of Patent: December 31, 2024Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Zhaopeng Tu, Jie Hao, Xing Wang, Longyue Wang
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Patent number: 12175100Abstract: A method for a memory system is disclosed. The memory system can include a memory controller and a memory device. The method can include receiving data that includes bits and is to be written into the memory device, counting a first bit number of the bits corresponding to a first state and a second bit number of the bits corresponding to the second state, and in response to the second bit number of the bits being larger than the first bit number of the bits, the flipping operation is performed.Type: GrantFiled: July 24, 2023Date of Patent: December 24, 2024Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Hua Tan, Xing Wang, Yaolong Gao, Fanya Bi, Zhe Sun, Bo Yu
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Patent number: D1056618Type: GrantFiled: March 15, 2023Date of Patent: January 7, 2025Inventor: Xing Wang Huang
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Patent number: D1073839Type: GrantFiled: October 19, 2024Date of Patent: May 6, 2025Inventor: Xing Wang