Abstract: An islanding detection method and apparatus, and a computer-readable storage medium. The detection method includes: determining a harmonic amplitude growth rate and a frequency growth rate of alternating current electricity output by an alternating current port of a grid-tied inverter; determining an islanding disturbance coefficient corresponding to the harmonic amplitude growth rate, where the harmonic amplitude growth rate and the islanding disturbance coefficient are in a monotonically increasing relationship; determining an islanding injection amount based on the frequency growth rate and the islanding disturbance coefficient corresponding to the harmonic amplitude growth rate; controlling, based on the islanding injection amount, the grid-tied inverter to output a reactive power or a reactive current over the alternating current port; and performing islanding detection based on a frequency of the alternating current electricity output by the alternating current port.

Abstract: A fault detection apparatus includes an image capture module and a detection module, and the fault detection apparatus is configured to capturing an image of the photovoltaic module in a light emitting state, and performing fault detection on the photovoltaic module based on the image when a signal-to-noise ratio of the image is maximized, to identify a fault type of the photovoltaic module.

Abstract: A control method for a string inverter, comprising: in a current/voltage (IV) curve scanning process, controlling an output power of an inverter circuit to be a specified power reference value, and controlling an output voltage of each non-IV curve scanning direct current (DC) to DC (DC-DC) circuit to be a specified voltage reference value, where the specified power reference value is less than or equal to a sum of input powers of all non-IV curve scanning DC-DC circuits the before IV curve scanning process, and where the specified voltage reference value is greater than or equal to a preset percentage of a maximum value in open-circuit voltages, before the IV curve scanning process, of photovoltaic strings connected to all IV curve scanning DC-DC circuits.

Abstract: One example method includes obtaining output powers at initial scanning points of photovoltaic strings in a first group and a second group. The output powers at the initial scan points of the photovoltaic strings in the first group can then be controlled to sequentially decrease, and the output powers at the initial scan points of the photovoltaic strings in the second group can then be controlled to sequentially increase. Scanning can then be performed in the initial scanning direction starting from output voltages corresponding to the output powers at the initial scan points of the first group. Scanning can then be performed in the initial scanning direction starting from output voltages corresponding to the output powers at the initial scan points of the second group, where output powers of the first group and the second group are kept to compensate each other during IV curve scanning.

Abstract: A control method for a string inverter, comprising: in a current/voltage (IV) curve scanning process, controlling an output power of an inverter circuit to be a specified power reference value, and controlling an output voltage of each non-IV curve scanning direct current (DC) to DC (DC-DC) circuit to be a specified voltage reference value, where the specified power reference value is less than or equal to a sum of input powers of all non-IV curve scanning DC-DC circuits the before IV curve scanning process, and where the specified voltage reference value is greater than or equal to a preset percentage of a maximum value in open-circuit voltages, before the IV curve scanning process, of photovoltaic strings connected to all IV curve scanning DC-DC circuits.

Abstract: A CT-SDADC of the present disclosure converts the analog input signal from a representation in an analog signal domain to a representation in a digital signal domain to provide the digital output signal. The CT-SDADC achieves the analog-to-digital conversion and ELDC by switching between two phases in the SAR sub-ADC: a sampling phase and a conversion phase. During the sampling phase, the SAR sub-ADC captures the analog input signal across multiple arrays of switchable capacitors. The conversion phase comprises a number of steps, and one or more bits of the digital output signal are resolved at each step of the conversion phase. A portion of the SC-DAC is driven by the delayed CT-SDADC output during the conversion phase to effectively compensate for excess loop delay caused by the CT-SDADC feedback loop.

Abstract: A CT-SDADC of the present disclosure converts the analog input signal from a representation in an analog signal domain to a representation in a digital signal domain to provide the digital output signal. The CT-SDADC achieves the analog-to-digital conversion and ELDC by switching between two phases in the SAR sub-ADC: a sampling phase and a conversion phase. During the sampling phase, the SAR sub-ADC captures the analog input signal across multiple arrays of switchable capacitors. The conversion phase comprises a number of steps, and one or more bits of the digital output signal are resolved at each step of the conversion phase. A portion of the SC-DAC is driven by the delayed CT-SDADC output during the conversion phase to effectively compensate for excess loop delay caused by the CT-SDADC feedback loop.

Abstract: A CMOS analog and audio front-end circuit includes an enhanced analog-to-digital converter (ADC) that achieves a desired signal-to-noise-and-distortion (SNDR) and an analog-front-end transmit (TX) digital-to-analog converter (DAC). The enhanced ADC includes an improved single Op-Amp resonator coupled to a feed-forward loop and can substantially reduce signal transfer function (STF) peaking of the enhanced ADC. The CMOS analog and audio front-end circuit is integrated with a baseband processor.

Abstract: A CMOS analog and audio front-end circuit includes an enhanced analog-to-digital converter (ADC) that achieves a desired signal-to-noise-and-distortion (SNDR) and an analog-front-end transmit (TX) digital-to-analog converter (DAC). The enhanced ADC includes an improved single Op-Amp resonator coupled to a feed-forward loop and can substantially reduce signal transfer function (STF) peaking of the enhanced ADC. The CMOS analog and audio front-end circuit is integrated with a baseband processor.

Abstract: Embodiments provide systems and methods for aligning the supply voltage signal applied to a power amplifier (PA) with the radio frequency (RF) output signal of the PA in a wireless device. The RF output signal is generated by applying a transmit signal to a transmit path of the wireless device. The supply voltage is generated by applying an envelope tracking (ET) signal, based on the transmit signal, to an envelope tracking (ET) path of the wireless device. Embodiments operate by estimating the delays of the ET path and the transmit path, and then controlling a relative delay between the transmit signal and the ET signal accordingly. In an embodiment, estimation of the delays of the ET path and the transmit path is done by correlating respective signals of each path.

Abstract: An analog-to-digital converter (ADC) includes reference charge cancellation features to at least partially offset a voltage distortion on a bypass capacitor of a reference buffer due to a voltage reference hit taken by a switched capacitor bank with which the bypass capacitor is connected. The charge cancellation may be configured in logic to be input signal dependent because different resolved bits or transitions between resolved bits may cause different amounts of voltage reference hits. By adjusting the bypass capacitor in response to each of at least some of the reference hits while resolving a word of bits, the reference voltage signal provided by the bypass capacitor undergoes far less settling, remaining more stable and linear for a more accurate reference voltage. Furthermore, a smaller capacitor may be used for the bypass capacitor, reducing power consumption and area on chip.

Abstract: Operating a game controller to identify a user by receiving touch pad input from at least one touch sensitive pad of the game controller that has a plurality of touch sensitive elements. The touch pad input corresponds to the user's touch of at least some of the plurality of touch sensitive elements. The touch pad input is at least partially processed by processing circuitry of the game controller and transmitted to a game console via a communications interface of the game controller for processing of the at least partially processed touch pad input to identify the user via pattern recognition. At least partially processing the touch pad input can be by identifying at least one finger orientation, at least one finger spacing, at least one finger width, a plurality of finger knuckle/joint locations, and/or a plurality of finger lengths based upon the touch pad input.

Abstract: An analog-to-digital converter (ADC) includes reference charge cancellation features to at least partially offset a voltage distortion on a bypass capacitor of a reference buffer due to a voltage reference hit taken by a switched capacitor bank with which the bypass capacitor is connected. The charge cancellation may be configured in logic to be input signal dependent because different resolved bits or transitions between resolved bits may cause different amounts of voltage reference hits. By adjusting the bypass capacitor in response to each of at least some of the reference hits while resolving a word of bits, the reference voltage signal provided by the bypass capacitor undergoes far less settling, remaining more stable and linear for a more accurate reference voltage. Furthermore, a smaller capacitor may be used for the bypass capacitor, reducing power consumption and area on chip.

Abstract: Embodiments provide systems and methods for aligning the supply voltage signal applied to a power amplifier (PA) with the radio frequency (RF) output signal of the PA in a wireless device. The RF output signal is generated by applying a transmit signal to a transmit path of the wireless device. The supply voltage is generated by applying an envelope tracking (ET) signal, based on the transmit signal, to an envelope tracking (ET) path of the wireless device. Embodiments operate by estimating the delays of the ET path and the transmit path, and then controlling a relative delay between the transmit signal and the ET signal accordingly. In an embodiment, estimation of the delays of the ET path and the transmit path is done by correlating respective signals of each path.

Abstract: An amplifier system can include an input amplifier configured to receive an analog input signal and provide an amplified signal corresponding to the analog input signal. A tracking loop is configured to employ delta modulation for tracking the amplified signal, the tracking loop providing a corresponding output signal. A biasing circuit is configured to adjust a bias current to maintain stable transconductance over temperature variations, the biasing circuit providing at least one bias signal for biasing at least one of the input amplifier and the tracking loop, whereby the circuitry receiving the at least one bias signal exhibits stable performance over the temperature variations. In another embodiment the biasing circuit can be utilized in other applications.

Abstract: The present invention relates generally to analog-to-digital converters (ADCs). Embodiments of the present invention provide novel ADC architectures directed at reducing the overall ADC area and power consumption. Embodiments of the present invention may be used in pipelined ADCs, cyclic ADCs, and successive approximation (SAR) ADCs, for example. Further, embodiments of the present invention may be implemented using both single-ended and differential configurations.

Abstract: A game controller with a communications interface, at least one touch sensitive pad having a plurality of touch sensitive elements, and processing circuitry coupled to the communications interface and the at least one touch sensitive pad. The processing circuitry receives touch pad input via the plurality of touch sensitive elements of the at least one touch sensitive pad. The processing circuitry then transmits the touch pad input to a game console via the communications interface. The touch sensitive pad can have a plurality of separate and distinct touch sensitive pads, allowing the processing circuitry to receive touch pad input via each of the plurality of separate and distinct touch sensitive pads. Touch pad input could include user finger and/or user thumb touch pad input.

Abstract: Operating a game controller to identify a user by receiving touch pad input from at least one touch sensitive pad of the game controller that has a plurality of touch sensitive elements. The touch pad input corresponds to the user's touch of at least some of the plurality of touch sensitive elements. The touch pad input is at least partially processed by processing circuitry of the game controller and transmitted to a game console via a communications interface of the game controller for processing of the at least partially processed touch pad input to identify the user via pattern recognition. At least partially processing the touch pad input can be by identifying at least one finger orientation, at least one finger spacing, at least one finger width, a plurality of finger knuckle/joint locations, and/or a plurality of finger lengths based upon the touch pad input.

Abstract: The present invention relates generally to analog-to-digital converters (ADCs). Embodiments of the present invention provide novel ADC architectures directed at reducing the overall ADC area and power consumption. Embodiments of the present invention may be used in pipelined ADCs, cyclic ADCs, and successive approximation (SAR) ADCs, for example. Further, embodiments of the present invention may be implemented using both single-ended and differential configurations.

Abstract: An amplifier system can include an input amplifier configured to receive an analog input signal and provide an amplified signal corresponding to the analog input signal. A tracking loop is configured to employ delta modulation for tracking the amplified signal, the tracking loop providing a corresponding output signal. A biasing circuit is configured to adjust a bias current to maintain stable transconductance over temperature variations, the biasing circuit providing at least one bias signal for biasing at least one of the input amplifier and the tracking loop, whereby the circuitry receiving the at least one bias signal exhibits stable performance over the temperature variations. In another embodiment the biasing circuit can be utilized in other applications.