Patents by Inventor Xue-Hung TSAI

Xue-Hung TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9431542
    Abstract: A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: August 30, 2016
    Assignee: E Ink Holdings Inc.
    Inventors: Wei-Tsung Chen, Chuang-Chuang Tsai, Ted-Hong Shinn, Xue-Hung Tsai, Chih-Hsiang Yang
  • Patent number: 9368634
    Abstract: A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 14, 2016
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Xue-Hung Tsai, Henry Wang, Wei-Tsung Chen
  • Publication number: 20150357475
    Abstract: A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain electrode on the substrate does not overlap the gate electrode.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 10, 2015
    Inventors: Chia-Chun YEH, Henry WANG, Xue-Hung TSAI, Chih-Hsuan WANG
  • Patent number: 9142628
    Abstract: A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain electrode on the substrate does not overlap the gate electrode.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: September 22, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chun Yeh, Henry Wang, Xue-Hung Tsai, Chih-Hsuan Wang
  • Patent number: 9123691
    Abstract: Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 1, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Chih-Hsuan Wang, Ted-Hong Shinn
  • Publication number: 20150206950
    Abstract: A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer.
    Type: Application
    Filed: November 24, 2014
    Publication date: July 23, 2015
    Inventors: Wei-Tsung Chen, Chuang-Chuang Tsai, Ted-Hong Shinn, Xue-Hung Tsai, Chih-Hsiang Yang
  • Publication number: 20150137091
    Abstract: An organic light-emitting diode display device includes a substrate, a light-absorption layer, an active array structure, and an organic light-emitting diode. The substrate has a first and a second surface opposite to each other. The light-absorption layer is disposed on the first surface, and has at least one opening exposing a portion of the first surface. The active array structure is positioned on the second surface, and includes at least one data line, at least one gate line, and at least one switching device electrically connected to the gate and data lines. The light-absorption layer overlaps at least one of the data line and the gate line when viewed in a direction perpendicular to the substrate. The organic light-emitting diode is electrically connected to the switching device, and the organic light-emitting diode overlaps the opening when viewed in the direction perpendicular to the substrate.
    Type: Application
    Filed: August 20, 2014
    Publication date: May 21, 2015
    Inventors: Wei-Chou LAN, Ted-Hong SHINN, Xue-Hung TSAI, Chi-Liang WU, Chih-Hsiang YANG
  • Patent number: 9012906
    Abstract: A thin film transistor disposed on a substrate is provided. The TFT includes a gate layer, an insulation layer, a carrier transmission layer, a passivation layer, a first source/drain layer, and a second source/drain layer. The gate layer is disposed on the substrate. The insulation layer is disposed on the gate layer. The carrier transmission layer is disposed on the insulation layer. The carrier transmission layer includes an active layer and a mobility enhancement layer. The passivation layer is disposed on the active layer. The first source/drain layer is disposed on the active layer. The second source/drain layer is disposed on the active layer. The mobility enhancement layer includes a first element. The active layer includes a second element. The electronegativity of the first element is smaller than that of the second element to enhance the carrier mobility of the active layer.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: April 21, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chun Yeh, Xue-Hung Tsai, Po-Hsin Lin
  • Patent number: 8946713
    Abstract: Disclosed herein is an electrostatic discharge protection structure which includes a signal line, a thin-film transistor and a shunt wire. The thin-film transistor includes a gate electrode, a metal-oxide semiconductor layer, a source electrode and a drain electrode. The first metal-oxide semiconductor layer is disposed above the first gate electrode. The metal-oxide semiconductor layer has a channel region characterized in having a width/length ratio of less than 1. The source electrode is equipotentially connected to the gate electrode. The shunt wire is electrically connected to the drain electrode. When the signal line receives a voltage surge of greater than a predetermined magnitude, the voltage surge is shunted through the thin-film transistor to the shunt wire.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: February 3, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Xue-Hung Tsai, Chia-Chun Yeh, Henry Wang, Ted-Hong Shinn
  • Patent number: 8901658
    Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: December 2, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
  • Patent number: 8872173
    Abstract: A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: October 28, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chun Yeh, Xue-Hung Tsai, Cheng-Hang Hsu, Wei-Tsung Chen, Ted-Hong Shinn
  • Patent number: 8829520
    Abstract: A thin film transistor (TFT) includes a gate, a semiconductor layer, an insulating layer, a source, a drain, and a current reduction layer. The insulating layer is disposed between the gate and the semiconductor layer. The source is connected to the semiconductor layer. The drain is connected to the semiconductor layer, and the source and the drain are separated from each other. The current reduction layer has a first part and a second part. The first part is disposed between the semiconductor layer and at least a part of the source, and the second part is disposed between the semiconductor layer and at least a part of the drain.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: September 9, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
  • Publication number: 20140084281
    Abstract: A thin film transistor disposed on a substrate is provided. The TFT includes a gate layer, an insulation layer, a carrier transmission layer, a passivation layer, a first source/drain layer, and a second source/drain layer. The gate layer is disposed on the substrate. The insulation layer is disposed on the gate layer. The carrier transmission layer is disposed on the insulation layer. The carrier transmission layer includes an active layer and a mobility enhancement layer. The passivation layer is disposed on the active layer. The first source/drain layer is disposed on the active layer. The second source/drain layer is disposed on the active layer. The mobility enhancement layer includes a first element. The active layer includes a second element. The electronegativity of the first element is smaller than that of the second element to enhance the carrier mobility of the active layer.
    Type: Application
    Filed: November 29, 2012
    Publication date: March 27, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Chia-Chun Yeh, Xue-Hung Tsai, Po-Hsin Lin
  • Publication number: 20140034944
    Abstract: A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.
    Type: Application
    Filed: March 15, 2013
    Publication date: February 6, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Xue-Hung Tsai, Henry Wang, Wei-Tsung Chen
  • Publication number: 20130320329
    Abstract: A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Chia-Chun YEH, Xue-Hung TSAI, Cheng-Hang HSU, Wei-Tsung CHEN, Ted-Hong SHINN
  • Publication number: 20130187149
    Abstract: Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.
    Type: Application
    Filed: September 14, 2012
    Publication date: July 25, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Henry WANG, Chia-Chun YEH, Xue-Hung TSAI, Chih-Hsuan WANG, Ted-Hong SHINN
  • Publication number: 20130087781
    Abstract: A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain to electrode on the substrate does not overlap the gate electrode.
    Type: Application
    Filed: August 22, 2012
    Publication date: April 11, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Chia-Chun YEH, Henry WANG, Xue-Hung TSAI, Chih-Hsuan WANG